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    Processor power consumption control and voltage drop via micro-architectural bandwidth throttling
    1.
    发明授权
    Processor power consumption control and voltage drop via micro-architectural bandwidth throttling 有权
    处理器功耗控制和电压降通过微架构带宽调节

    公开(公告)号：US08028181B2

    公开(公告)日：2011-09-27

    申请号：US12284303

    申请日：2008-09-19

    申请人： Sanjeev Jahagirdar ,  Edward Gamsaragan ,  Scott E. Siers

    发明人： Sanjeev Jahagirdar ,  Edward Gamsaragan ,  Scott E. Siers

    IPC分类号： G06F1/00

    CPC分类号： G06F1/3203 ,  G06F1/3296 ,  Y02D10/172

    摘要： A method, device, and system are disclosed. In one embodiment the method includes supplying a processor with a first voltage. The method also includes allowing the processor to function within an enhanced processor halt state at the first voltage. The first voltage is a voltage below the lowest compatible voltage for the enhanced processor halt state. The method allows the processor to execute instructions upon waking from the enhanced processor halt state at the first voltage by throttling a maximum throughput rate of instructions being executed in the processor.

    摘要翻译： 公开了一种方法，装置和系统。 在一个实施例中，该方法包括向处理器提供第一电压。 该方法还包括允许处理器在第一电压下在增强的处理器停止状态下起作用。 第一电压是低于用于增强的处理器停止状态的最低兼容电压的电压。 该方法允许处理器在通过在处理器中执行的指令的最大吞吐速率从第一电压处的增强型处理器停止状态唤醒时执行指令。

    Processor power consumption control and voltage drop via micro-architectural bandwidth throttling
    2.
    发明申请
    Processor power consumption control and voltage drop via micro-architectural bandwidth throttling 有权
    处理器功耗控制和电压降通过微架构带宽调节

    公开(公告)号：US20100077232A1

    公开(公告)日：2010-03-25

    申请号：US12284303

    申请日：2008-09-19

    申请人： Sanjeev Jahagirdar ,  Edward Gamsaragan ,  Scott E. Siers

    发明人： Sanjeev Jahagirdar ,  Edward Gamsaragan ,  Scott E. Siers

    IPC分类号： G06F1/26

    CPC分类号： G06F1/3203 ,  G06F1/3296 ,  Y02D10/172

    摘要： A method, device, and system are disclosed. In one embodiment the method includes supplying a processor with a first voltage. The method also includes allowing the processor to function within an enhanced processor halt state at the first voltage. The first voltage is a voltage below the lowest compatible voltage for the enhanced processor halt state. The method allows the processor to execute instructions upon waking from the enhanced processor halt state at the first voltage by throttling a maximum throughput rate of instructions being executed in the processor.

    摘要翻译： 公开了一种方法，装置和系统。 在一个实施例中，该方法包括向处理器提供第一电压。 该方法还包括允许处理器在第一电压下在增强的处理器停止状态下起作用。 第一电压是低于用于增强的处理器停止状态的最低兼容电压的电压。 该方法允许处理器在通过在处理器中执行的指令的最大吞吐速率从第一电压处的增强型处理器停止状态唤醒时执行指令。

    PROCESSOR POWER CONSUMPTION CONTROL AND VOLTAGE DROP VIA MICRO-ARCHITECTURAL BANDWIDTH THROTTLING
    3.
    发明申请
    PROCESSOR POWER CONSUMPTION CONTROL AND VOLTAGE DROP VIA MICRO-ARCHITECTURAL BANDWIDTH THROTTLING 审中-公开
    处理器消耗电力控制和电压降通过微结构带宽折射

    公开(公告)号：US20120210105A1

    公开(公告)日：2012-08-16

    申请号：US13212042

    申请日：2011-08-17

    申请人： Sanjeev Jahagirdar ,  Edward Gamsaragan ,  Scott E. Siers

    发明人： Sanjeev Jahagirdar ,  Edward Gamsaragan ,  Scott E. Siers

    IPC分类号： G06F9/30

    CPC分类号： G06F1/3203 ,  G06F1/3296 ,  Y02D10/172

    摘要： A method, device, and system are disclosed. In one embodiment the method includes supplying a processor with a first voltage. The method also includes allowing the processor to function within an enhanced processor halt state at the first voltage. The first voltage is a voltage below the lowest compatible voltage for the enhanced processor halt state. The method allows the processor to execute instructions upon waking from the enhanced processor halt state at the first voltage by throttling a maximum throughput rate of instructions being executed in the processor.

    摘要翻译： 公开了一种方法，装置和系统。 在一个实施例中，该方法包括向处理器提供第一电压。 该方法还包括允许处理器在第一电压下在增强的处理器停止状态下起作用。 第一电压是低于用于增强的处理器停止状态的最低兼容电压的电压。 该方法允许处理器在通过在处理器中执行的指令的最大吞吐速率从第一电压处的增强型处理器停止状态唤醒时执行指令。

    METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING ENHANCED TEMPERATURE BASED VOLTAGE CONTROL
    9.
    发明申请
    METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING ENHANCED TEMPERATURE BASED VOLTAGE CONTROL 有权
    能源效率和能源保护的方法，装置和系统，包括基于增强温度的电压控制

    公开(公告)号：US20120159216A1

    公开(公告)日：2012-06-21

    申请号：US13335747

    申请日：2011-12-22

    申请人： Ryan D. Wells ,  Uzi Sasson ,  Inder M. Sodhi ,  Sanjeev Jahagirdar

    发明人： Ryan D. Wells ,  Uzi Sasson ,  Inder M. Sodhi ,  Sanjeev Jahagirdar

    IPC分类号： G06F1/32 ,  G06F1/26

    CPC分类号： G06F1/26 ,  G06F1/206 ,  G06F1/3206 ,  G06F1/3296 ,  Y02D10/16 ,  Y02D10/172

    摘要： Embodiments of systems, apparatuses, and methods for energy efficiency and energy conservation including enhanced temperature based voltage control are described. In one embodiment, an apparatus includes a processor and a controller coupled with the processor. In one embodiment, the controller receives a temperature measurement corresponding to a current temperature of the processor. In one embodiment, the controller further determines an adjustment to a voltage being applied to the processor based at least in part on the temperature measurement and a plurality of internal limits of the processor, wherein the determined adjustment to the voltage is based on an inverse temperature dependence relationship between at least one of an operating frequency and a voltage of the processor, and temperature. In one embodiment, the controller provides the determined adjustment to the voltage to a voltage regulator interface.

    摘要翻译： 描述了包括增强的基于温度的电压控制的能量效率和节能的系统，装置和方法的实施例。 在一个实施例中，一种装置包括处理器和与处理器耦合的控制器。 在一个实施例中，控制器接收与处理器的当前温度相对应的温度测量。 在一个实施例中，控制器至少部分地基于温度测量和处理器的多个内部限制来确定对施加到处理器的电压的调整，其中所确定的对电压的调整基于逆温度 处理器的工作频率和电压中的至少一个之间的依赖关系以及温度。 在一个实施例中，控制器将确定的调整提供给电压调节器接口的电压。

    METHOD, APPARATUS AND SYSTEM TO DYNAMICALLY CHOOSE AN OPTIMUM POWER STATE
    10.
    发明申请
    METHOD, APPARATUS AND SYSTEM TO DYNAMICALLY CHOOSE AN OPTIMUM POWER STATE 有权
    方法，装置和系统动态选择最佳电源状态

    公开(公告)号：US20110179295A1

    公开(公告)日：2011-07-21

    申请号：US13074871

    申请日：2011-03-29

    申请人： Sanjeev Jahagirdar ,  Varghese George ,  Jose Allarey ,  Eric Heit

    发明人： Sanjeev Jahagirdar ,  Varghese George ,  Jose Allarey ,  Eric Heit

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3203

    摘要： Some embodiments of the invention include an apparatus and method for dynamically choosing an optimum power state. In some embodiments, the optimum power state may be determined from historical information about the various power states that any of the embodiments of the apparatus or a system equipped with embodiments of the apparatus or operating embodiments of the method may encounter. Some embodiments may generate registers to maintain information regarding the various power states. In some embodiments, power management logic may determine the optimum power state based upon this information. Other embodiments are described.

    摘要翻译： 本发明的一些实施例包括用于动态选择最佳功率状态的装置和方法。 在一些实施例中，最佳功率状态可以根据关于各种功率状态的历史信息来确定，该装置或装置的任何实施例装备有该方法的装置或操作实施例的实施例可能会遇到。 一些实施例可以生成寄存器来维护关于各种功率状态的信息。 在一些实施例中，功率管理逻辑可以基于该信息来确定最佳功率状态。 描述其他实施例。