Invention Grant
US08062911B2 Method of manufacturing a semiconductor integrated circuit device and a method of manufacturing a thin film probe sheet for using the same
有权
半导体集成电路器件的制造方法以及使用该半导体集成电路器件的薄膜探针片的制造方法
- Patent Title: Method of manufacturing a semiconductor integrated circuit device and a method of manufacturing a thin film probe sheet for using the same
- Patent Title (中): 半导体集成电路器件的制造方法以及使用该半导体集成电路器件的薄膜探针片的制造方法
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Application No.: US11958369Application Date: 2007-12-17
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Publication No.: US08062911B2Publication Date: 2011-11-22
- Inventor: Akio Hasebe , Yasuhiro Motoyama , Yasunori Narizuka , Seigo Nakamura , Kenji Kawakami
- Applicant: Akio Hasebe , Yasuhiro Motoyama , Yasunori Narizuka , Seigo Nakamura , Kenji Kawakami
- Applicant Address: JP Kawasaki-shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi
- Agency: Miles & Stockbridge P.C.
- Priority: JP2006-355578 20061228
- Main IPC: H01L21/66
- IPC: H01L21/66 ; G01R31/26

Abstract:
A probe having a sufficient height is manufactured by selectively depositing, over the main surface of a wafer, a copper film in a region in which a metal film is to be formed and a region which will be outside an adhesion ring when a probe card is fabricated; forming the metal film, polyimide film, interconnect, another polyimide film, another interconnect and a further polyimide film; and then removing the wafer and copper film. According to the present invention, when probe testing is performed using a prober (thin film probe) having the probe formed in the above-described manner while utilizing the manufacturing technology of semiconductor integrated circuit devices, it is possible to prevent breakage of the prober and a wafer to be tested.
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