发明授权
- 专利标题: Integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit
- 专利标题(中): 集成晶体管和反熔丝作为高压集成电路的编程元件
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申请号: US12800096申请日: 2010-05-07
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公开(公告)号: US08164125B2公开(公告)日: 2012-04-24
- 发明人: Sujit Banerjee , Martin H. Manley
- 申请人: Sujit Banerjee , Martin H. Manley
- 申请人地址: US CA San Jose
- 专利权人: Power Integrations, Inc.
- 当前专利权人: Power Integrations, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: The Law Offices of Bradley J. Bereznak
- 主分类号: H01L29/76
- IPC分类号: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119
摘要:
A semiconductor device includes an N type well region in a P type substrate. A source region of a MOSFET is laterally separated from a boundary of the well region, which includes the drain of the MOSFET. An insulated gate of the MOSFET extends laterally from the source region to at least just past the boundary of the well region. A polysilicon layer, which forms a first plate of a capacitive anti-fuse, is insulated from an area of the well region, which forms the second plate of the anti-fuse. The anti-fuse is programmed by application of a voltage across the first and second capacitive plates sufficient to destroy at least a portion of the second dielectric layer, thereby electrically shorting the polysilicon layer to the drain of the HVFET.