发明授权
US08207568B2 Process for single and multiple level metal-insulator-metal integration with a single mask
有权
单层和多层金属绝缘体金属与单一掩模集成的工艺
- 专利标题: Process for single and multiple level metal-insulator-metal integration with a single mask
- 专利标题(中): 单层和多层金属绝缘体金属与单一掩模集成的工艺
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申请号: US11162661申请日: 2005-09-19
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公开(公告)号: US08207568B2公开(公告)日: 2012-06-26
- 发明人: Anil K. Chinthakindi , Douglas D. Coolbaugh , Keith E. Downes , Ebenezer E. Eshun , Zhong-Xiang He , Robert M. Rassel , Anthony K. Stamper
- 申请人: Anil K. Chinthakindi , Douglas D. Coolbaugh , Keith E. Downes , Ebenezer E. Eshun , Zhong-Xiang He , Robert M. Rassel , Anthony K. Stamper
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Roberts Mlotkowski Safran & Cole, P.C.
- 代理商 Anthony Canale
- 主分类号: H01L29/92
- IPC分类号: H01L29/92
摘要:
Method of fabricating a MIM capacitor and MIM capacitor. The method includes providing a substrate including a dielectric layer formed on a first conductive layer and a second conductive layer formed over the dielectric layer, and patterning a mask on the second conductive layer. Exposed portions of the second conductive layer are removed to form an upper plate of a MIM capacitor having edges substantially aligned with respective edges of the mask. The upper plate is undercut so that edges of the upper plate are located under the mask. Exposed portions of the dielectric layer and the first conductive layer are removed using the mask to form a capacitor dielectric layer and a lower plate of the MIM capacitor having edges substantially aligned with respective edges of the mask.
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