发明授权
- 专利标题： Voltage regulator with high accuracy and high power supply rejection ratio
- 专利标题（中）： 电压调节器具有高精度和高电源抑制比
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申请号： US12750260申请日： 2010-03-30
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公开(公告)号： US08378654B2公开(公告)日： 2013-02-19
- 发明人: Chan-Hong Chern , Tzu Ching Chang , Min-Shueh Yuan , Yuwen Swei , Chih-Chang Lin , Chiang Pu , Ming-Chieh Huang , Kuoyuan Hsu
- 申请人： Chan-Hong Chern , Tzu Ching Chang , Min-Shueh Yuan , Yuwen Swei , Chih-Chang Lin , Chiang Pu , Ming-Chieh Huang , Kuoyuan Hsu
- 申请人地址： TW
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW
- 代理机构： Lowe Hauptman Ham & Berner, LLP
- 主分类号： G05F1/44
- IPC分类号： G05F1/44
摘要：
A voltage regulator circuit with high accuracy and Power Supply Rejection Ratio (PSRR) is provided. In one embodiment, an op-amp with a voltage reference input to an inverting input has the first output connected to a PMOS transistor's gate. The PMOS transistor's source and drain are each connected to the power supply and the voltage regulator output. The voltage regulator output is connected to an NMOS transistor biased in saturation mode and a series of two resistors. The non-inverting input of the op-amp is connected in between the two resistors for the first feedback loop. The op-amp's second output is connected to the gate of the NMOS transistor through an AC-coupling capacitor for the second feedback loop. The op-amp's first output can be connected to the power supply voltage through a capacitor to further improve high frequency PSRR. In another embodiment, the role of PMOS and NMOS transistors is reversed.