Invention Grant
- Patent Title: Semiconductor package having electrical connecting structures and fabrication method thereof
- Patent Title (中): 具有电连接结构的半导体封装及其制造方法
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Application No.: US12859635Application Date: 2010-08-19
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Publication No.: US08390118B2Publication Date: 2013-03-05
- Inventor: Pang-Chun Lin , Chun-Yuan Li , Fu-Di Tang , Chien-Ping Huang , Chun-Chi Ke
- Applicant: Pang-Chun Lin , Chun-Yuan Li , Fu-Di Tang , Chien-Ping Huang , Chun-Chi Ke
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Edwards Wildman Palmer LLP
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW098144920 20091225
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52

Abstract:
A semiconductor package having electrical connecting structures includes: a conductive layer having a die pad and traces surrounding the die pad; a chip; bonding wires; an encapsulant with a plurality of cavities having a depth greater than the thickness of the die pad and traces for embedding the die pad and the traces therein, and the cavities exposing the die pad and the traces; a solder mask layer formed in the cavities and having a plurality of openings for exposing the trace ends and a portion of the die pad; and solder balls formed in the openings and electrically connected to the trace ends. Engaging the solder mask layer with the encapsulant enhances adhesion strength of the solder mask layer so as to prolong the moisture permeation path and enhance package reliability.
Public/Granted literature
- US20110156252A1 SEMICONDUCTOR PACKAGE HAVING ELECTRICAL CONNECTING STRUCTURES AND FABRICATION METHOD THEREOF Public/Granted day:2011-06-30
Information query
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