Invention Grant
- Patent Title: Method of fabricating semiconductor device having buried wiring
- Patent Title (中): 制造具有埋地布线的半导体器件的方法
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Application No.: US12704358Application Date: 2010-02-11
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Publication No.: US08466052B2Publication Date: 2013-06-18
- Inventor: Jong-min Baek , Hee-sook Park , Seong-hwee Cheong , Gil-heyun Choi , Byung-hak Lee , Tae-ho Cha , Jae-hwa Park , Su-kyoung Kim
- Applicant: Jong-min Baek , Hee-sook Park , Seong-hwee Cheong , Gil-heyun Choi , Byung-hak Lee , Tae-ho Cha , Jae-hwa Park , Su-kyoung Kim
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2009-0012973 20090217
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/3205 ; H01L21/321 ; H01L21/3213

Abstract:
A method of fabricating a semiconductor device can include forming a trench in a semiconductor substrate, forming a first conductive layer on a bottom surface and side surfaces of the trench, and selectively forming a second conductive layer on the first conductive layer to be buried in the trench. The second conductive layer may be formed selectively on the first conductive layer by using an electroless plating method or using a metal organic chemical vapor deposition (MOCVD) or an atomic layer deposition (ALD) method.
Public/Granted literature
- US20100210105A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE HAVING BURIED WIRING Public/Granted day:2010-08-19
Information query
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