发明授权
- 专利标题: Package-on-package interconnect stiffener
- 专利标题(中): 封装在一起的互连加强筋
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申请号: US12384984申请日: 2009-04-10
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公开(公告)号: US08513792B2公开(公告)日: 2013-08-20
- 发明人: Sanka Ganesan , Yosuke Kanaoka , Ram S. Viswanath , Rajasekaran Swaminathan , Robert M. Nickerson , Leonel R. Arana , John S. Guzek , Yoshihiro Tomita
- 申请人: Sanka Ganesan , Yosuke Kanaoka , Ram S. Viswanath , Rajasekaran Swaminathan , Robert M. Nickerson , Leonel R. Arana , John S. Guzek , Yoshihiro Tomita
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: H01L23/02
- IPC分类号: H01L23/02 ; H01L23/34 ; H01L23/48 ; H01L23/52 ; H01L29/40
摘要:
Embodiments of the invention relate to a package-on-package (PoP) assembly comprising a top device package and a bottom device package interconnected by way of an electrically interconnected planar stiffener. Embodiments of the invention include a first semiconductor package having a plurality of inter-package contact pads and a plurality of second level interconnect (SLI) pads; a second semiconductor package having a plurality of SLI pads on the bottom side of the package; and a planar stiffener having a first plurality of planar contact pads on the top side of the stiffener electrically connected to the SLI pads of the second package, and a second plurality of planar contact pads electrically connected to the inter-package contact pads of the first package.
公开/授权文献
- US20100258927A1 Package-on-package interconnect stiffener 公开/授权日:2010-10-14
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