Invention Grant
- Patent Title: MRAM etching processes
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Application No.: US13199490Application Date: 2011-08-30
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Publication No.: US08536063B2Publication Date: 2013-09-17
- Inventor: Kimihiro Satoh , Yiming Huai , Jing Zhang , Rajiv Yadav Ranjan , Parviz Keshtbod , Roger K. Malmhall
- Applicant: Kimihiro Satoh , Yiming Huai , Jing Zhang , Rajiv Yadav Ranjan , Parviz Keshtbod , Roger K. Malmhall
- Applicant Address: US CA Fremont
- Assignee: Avalanche Technology Inc.
- Current Assignee: Avalanche Technology Inc.
- Current Assignee Address: US CA Fremont
- Agent G. Marlin Knight
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L21/461

Abstract:
Various embodiments of the invention relate to etching processes used in fabrication of MTJ cells in an MRAM device. The various embodiments can be used in combination with each other. The first embodiment adds a hard mask buffer layer between a hard mask and a top electrode. The second embodiment uses a multilayered etching hard mask. The third embodiment uses a multilayered top electrode structure including a first Cu layer under a second layer such as Ta. The fourth embodiment is a two-phase etching process used for the bottom electrode to remove re-deposited material while maintaining a more vertical sidewall etching profile. In the first phase the bottom electrode layer is removed using carbonaceous reactive ion etching until the endpoint. In the second phase an inert gas and/or oxygen plasma is used to remove the polymer that was deposited during the previous etching processes.
Public/Granted literature
- US20130052752A1 Mram etching processes Public/Granted day:2013-02-28
Information query
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