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公开(公告)号：US12278195B1
公开(公告)日：2025-04-15
申请号：US18542672
申请日：2023-12-16
Applicant: Avalanche Technology, Inc.
Inventor： Zihui Wang , Yiming Huai
IPC: H01L23/552 , H01L23/00 , H01L23/498 , H01L25/065 , H10B80/00
Abstract: A packaged semiconductor device includes one or more semiconductor dies with at least one MRAM die; a package substrate having first and second planar surfaces that are substantially larger than planar surfaces of the semiconductor dies, the first planar surface of the package substrate being disposed adjacent to the semiconductor dies and including a plurality of package bond pads that are electrically connected to the semiconductor dies, the second planar surface of the package substrate including a plurality of solder bumps electrically connected to the package bond pads; and a soft magnetic cap confronting the semiconductor dies and having an edge that extends toward and attaches to the package substrate, thereby encapsulating the semiconductor dies. The package substrate includes first and second outer conductive layers and a soft magnetic layer interposed between and separated from the first and second outer conductive layers by first and second insulating layers.
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公开(公告)号：US20240015986A1
公开(公告)日：2024-01-11
申请号：US17952821
申请日：2022-09-26
Applicant: Avalanche Technology, Inc.
Inventor： Zhiqiang Wei , Zihui Wang
CPC classification number: H01L27/224 , H01L43/12
Abstract: The present invention is directed to a memory cell including first and second unidirectional selectors coupled in parallel to a nonvolatile memory element. Each of the first and second unidirectional selectors includes first, second, and third electrode layers; a first insulator layer interposed between the first and second electrode layers; and a second insulator layer interposed between the second and third electrode layers. The first insulator layer of the first unidirectional selector includes therein a permanent conductive path and the second insulator layer of the first unidirectional selector is operable to form therein a volatile conductive path upon application of a potential across the first unidirectional selector. The second insulator layer of the second unidirectional selector includes therein another permanent conductive path and the first insulator layer of the second unidirectional selector is operable to form therein another volatile conductive path upon application of another potential across the second selector.
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公开(公告)号：US11785784B2
公开(公告)日：2023-10-10
申请号：US17752154
申请日：2022-05-24
Applicant: Avalanche Technology, Inc.
Inventor： Zihui Wang , Yiming Huai
Abstract: The present invention is directed to a perpendicular magnetic structure including a seed layer structure that includes a first seed layer comprising a metal element and oxygen, and a second seed layer formed on top of the first seed layer and comprising chromium. The metal element is one of titanium, tantalum, or magnesium. The perpendicular magnetic structure further includes a magnetic fixed layer structure formed on top of the seed layer structure and having an invariable magnetization direction substantially perpendicular to a layer plane of the magnetic fixed layer structure. The magnetic fixed layer structure includes layers of a magnetic material interleaved with layers of a transition metal. The magnetic material includes cobalt. The transition metal is one of nickel, platinum, palladium, or iridium.
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公开(公告)号：US20220376172A1
公开(公告)日：2022-11-24
申请号：US17871147
申请日：2022-07-22
Applicant: Avalanche Technology, Inc.
Inventor： Zihui Wang , Yiming Huai
IPC: H01L43/08 , G11C11/15 , G11C11/16 , H01L43/02 , H01F10/32 , H01F41/30 , H01L27/22 , H01L29/66 , H01L43/10
Abstract: The present invention is directed to a magnetic memory element including a magnetic free layer structure incorporating two magnetic free layers separated by a perpendicular enhancement layer (PEL) and having a variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure formed adjacent to the insulating tunnel junction layer opposite the magnetic free layer structure; an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure; and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. The magnetic reference layer structure includes first, second, and third magnetic reference layers separated by two PELs and having a first invariable magnetization direction substantially perpendicular to layer planes thereof. The magnetic fixed layer has a second invariable magnetization direction substantially opposite to the first invariable magnetization direction.
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公开(公告)号：US20210390995A1
公开(公告)日：2021-12-16
申请号：US16900470
申请日：2020-06-12
Applicant: Avalanche Technology, Inc.
Inventor： Dean K. Nobunaga
IPC: G11C11/16
Abstract: The present invention is directed to a nonvolatile memory device including a plurality of memory cells arranged in rows and columns, a plurality of word lines with each connected to a respective row of the memory cells along a row direction, a plurality of bit lines with each connected to a respective column of the memory cells along a column direction; a column decoder connected to the bit lines; a plurality of sense amplifiers connected to the column decoder; and a plurality of sense amplifier control circuits. Each of the sense amplifiers is connected to a unique one of the sense amplifier control circuits. Each of the sense amplifier control circuits includes a current detector circuit for detecting a sensing current, a current booster circuit for boosting the sensing current, and a timer circuit for providing a delayed trigger for a respective one of the sense amplifiers connected thereto.
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Patent Agency Ranking
公开(公告)号：US20210159399A1
公开(公告)日：2021-05-27
申请号：US17156562
申请日：2021-01-23
Applicant: Avalanche Technology, Inc.
Inventor： Yiming Huai , Zihui Wang
IPC: H01L43/08 , G11C11/15 , G11C11/16 , H01L43/02 , H01L43/10 , H01F10/32 , H01F41/30 , H01L27/22 , H01L29/66
Abstract: The present invention is directed to a magnetic memory element including a magnetic free layer structure incorporating three magnetic free layers separated by two perpendicular enhancement layers (PELs) and having a variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a first magnetic reference layer formed adjacent to the insulating tunnel junction layer opposite the magnetic free layer structure; a second magnetic reference layer separated from the first magnetic reference layer by a third perpendicular enhancement layer; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer; and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. The first and second magnetic reference layers have a first invariable magnetization direction substantially perpendicular to layer planes thereof. The magnetic fixed layer has a second invariable magnetization direction substantially opposite to the first invariable magnetization direction.
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7.发明授权公开(公告)号：US10936327B2
公开(公告)日：2021-03-02
申请号：US16808099
申请日：2020-03-03
Applicant: Avalanche Technology, Inc.
Inventor： Ngon Van Le , Ravishankar Tadepalli
IPC: G06F9/4401 , G06F15/78 , G11C14/00 , G11C11/16
Abstract: The present invention is directed to a method for booting a system-on-chip (SoC) including the steps of directly executing a boot software from an on-chip magnetic random access memory (MRAM) residing on a same semiconductor as the SoC; directly executing an operating system software from an external MRAM by the SoC without loading the operating system into a volatile memory; and directly executing an application software from the external MRAM by the SoC, wherein the external MRAM is coupled to the SoC and is configured for storing the operating system software and the application software.
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公开(公告)号：US10818731B1
公开(公告)日：2020-10-27
申请号：US16446532
申请日：2019-06-19
Applicant: Avalanche Technology, Inc.
Inventor： Kimihiro Satoh
Abstract: The present invention is directed to a memory array including one or more memory layers, each of which includes a first plurality of memory cells and a second plurality of memory cells arranged in alternated odd and even columns, respectively; multiple odd horizontal lines with each connected to a respective odd column of the first plurality of memory cells; multiple even horizontal lines with each connected to a respective even column of the second plurality of memory cells; multiple transverse lines with each connected to one of the first plurality of memory cells and a respective one of the second plurality of memory cells disposed adjacent thereto along a row direction; and multiple vertical lines with each connected to a respective one of the multiple transverse lines. The odd horizontal lines collectively form fingers of a first comb structure and the even horizontal lines collectively form fingers of a second comb structure.
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公开(公告)号：US10593727B2
公开(公告)日：2020-03-17
申请号：US15863825
申请日：2018-01-05
Applicant: Avalanche Technology, Inc.
Inventor： Hongxin Yang , Bing K. Yen , Jing Zhang
Abstract: The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element and a two-terminal selector element coupled in series. The MTJ memory element includes a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween. The magnetic reference layer structure includes one or more magnetic reference layers having a first invariable magnetization direction substantially perpendicular to layer planes thereof. The two-terminal selector element includes a first inert electrode and a second inert electrode with a volatile switching layer interposed therebetween; a first active electrode formed adjacent to the first inert electrode; and a second active electrode formed adjacent to the second inert electrode. The volatile switching layer includes a plurality of metal-rich particles or clusters embedded in a matrix or at least one conductor layer interleaved with insulating layers.
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公开(公告)号：US10361362B2
公开(公告)日：2019-07-23
申请号：US15815516
申请日：2017-11-16
Applicant: Avalanche Technology, Inc.
Inventor： Huadong Gan , Yiming Huai , Yuchen Zhou , Zihui Wang
Abstract: The present invention is directed to a magnetic memory element including a magnetic free layer and a first magnetic reference layer with an insulating tunnel junction layer interposed therebetween; a second magnetic reference layer made of a material comprising cobalt and formed adjacent to the first magnetic reference layer opposite the insulating tunnel junction layer; an iridium layer formed adjacent to the second magnetic reference layer opposite the first magnetic reference layer; and a magnetic fixed layer formed adjacent to the iridium layer. The magnetic free layer has a variable magnetization direction substantially perpendicular to the layer plane thereof. The first and second magnetic reference layers have a first fixed magnetization direction substantially perpendicular to the layer planes thereof. The magnetic fixed layer has a second fixed magnetization direction that is substantially perpendicular to the layer plane thereof and is substantially opposite to the first fixed magnetization direction.
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