Invention Grant
- Patent Title: Insulated gate bipolar transistor structure having low substrate leakage
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Application No.: US13372037Application Date: 2012-02-13
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Publication No.: US08575694B2Publication Date: 2013-11-05
- Inventor: Ker Hsiao Huo , Chih-Chang Cheng , Ru-Yi Su , Jen-Hao Yeh , Fu-Chih Yang , Chun Lin Tsai
- Applicant: Ker Hsiao Huo , Chih-Chang Cheng , Ru-Yi Su , Jen-Hao Yeh , Fu-Chih Yang , Chun Lin Tsai
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW
- Agency: Lowe Hauptman & Ham, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/786 ; H01L29/02 ; H01L23/58 ; H01L21/70 ; H01L21/336 ; H01L21/8238

Abstract:
A high voltage metal-oxide-semiconductor laterally diffused device (HV LDMOS), particularly an insulated gate bipolar junction transistor (IGBT), and a method of making it are provided in this disclosure. The device includes a semiconductor substrate, a gate structure formed on the substrate, a source and a drain formed in the substrate on either side of the gate structure, a first doped well formed in the substrate, and a second doped well formed in the first well. The gate, source, second doped well, a portion of the first well, and a portion of the drain structure are surrounded by a deep trench isolation feature and an implanted oxygen layer in the silicon substrate.
Public/Granted literature
- US20130207187A1 INSULATED GATE BIPOLAR TRANSISTOR STRUCTURE HAVING LOW SUBSTRATE LEAKAGE Public/Granted day:2013-08-15
Information query
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