发明授权
US08884418B2 Semiconductor device and method of forming PIP with inner known good die interconnected with conductive bumps
有权
半导体器件和用导电凸块互连的具有内部已知的良好管芯的PIP形成方法
- 专利标题: Semiconductor device and method of forming PIP with inner known good die interconnected with conductive bumps
- 专利标题(中): 半导体器件和用导电凸块互连的具有内部已知的良好管芯的PIP形成方法
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申请号: US13606451申请日: 2012-09-07
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公开(公告)号: US08884418B2公开(公告)日: 2014-11-11
- 发明人: Zigmund R. Camacho , Frederick R. Dahilig , Lionel Chien Hui Tay
- 申请人: Zigmund R. Camacho , Frederick R. Dahilig , Lionel Chien Hui Tay
- 申请人地址: SG Singapore
- 专利权人: STATS ChipPAC, Ltd.
- 当前专利权人: STATS ChipPAC, Ltd.
- 当前专利权人地址: SG Singapore
- 代理机构: Patent Law Group: Atkins and Associates, P.C.
- 代理商 Robert D. Atkins
- 主分类号: H01L23/24
- IPC分类号: H01L23/24 ; H01L23/28 ; H01L23/48 ; H01L25/11 ; H01L23/31 ; H01L23/538 ; H01L21/56 ; H01L21/683 ; H01L23/498 ; H01L23/00 ; H01L25/065 ; H01L25/00 ; H01L23/495
摘要:
A PiP semiconductor device has an inner known good semiconductor package. In the semiconductor package, a first via is formed in a temporary carrier. A first conductive layer is formed over the carrier and into the first via. The first conductive layer in the first via forms a conductive bump. A first semiconductor die is mounted to the first conductive layer. A first encapsulant is deposited over the first die and carrier. The semiconductor package is mounted to a substrate. A second semiconductor die is mounted to the first conductive layer opposite the first die. A second encapsulant is deposited over the second die and semiconductor package. A second via is formed in the second encapsulant to expose the conductive bump. A second conductive layer is formed over the second encapsulant and into the second via. The second conductive layer is electrically connected to the second die.
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