A global interrupt number space 38 is provided for use in message signalled interrupts. Interrupt destinations 10, 12, 14, 16 are provided with pending interrupt caches 24 with either backing storage provided by global pending status memory 34 shared by all the caches or separate individual pending status memories 56. The interrupt number space may be divided into regions with programmable mapping data being used to indicate which interrupt destinations are responsible for which regions. When interrupts are migrated from one interrupt destination to another, then such programmable mapping data is updated. Pending interrupts may be flushed back to the global pending status memory 34 during the reassignment process such that this pending interrupt data may be picked up by the newly responsible interrupt destination.