Invention Grant
US09018768B2 Integrated circuit having through silicon via structure with minimized deterioration
有权
具有通过硅通孔结构并具有最小化劣化的集成电路
- Patent Title: Integrated circuit having through silicon via structure with minimized deterioration
- Patent Title (中): 具有通过硅通孔结构并具有最小化劣化的集成电路
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Application No.: US13627790Application Date: 2012-09-26
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Publication No.: US09018768B2Publication Date: 2015-04-28
- Inventor: Byung-lyul Park , Gil-heyun Choi , Suk-chul Bang , Kwang-jin Moon , Dong-chan Lim , Deok-young Jung
- Applicant: Byung-lyul Park , Gil-heyun Choi , Suk-chul Bang , Kwang-jin Moon , Dong-chan Lim , Deok-young Jung
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Agent Monica H. Choi
- Priority: KR10-2010-0061184 20100628
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/02 ; H01L23/52 ; H01L29/40 ; H01L21/768 ; H01L25/065

Abstract:
A semiconductor device includes a circuit pattern over a first surface of a substrate, an insulating interlayer covering the circuit pattern, a TSV structure filling a via hole through the insulating interlayer and the substrate, an insulation layer structure on an inner wall of the via hole and on a top surface of the insulating interlayer, a buffer layer on the TSV structure and the insulation layer structure, a conductive structure through the insulation layer structure and a portion of the insulating interlayer to be electrically connected to the circuit pattern, a contact pad onto a bottom of the TSV structure, and a protective layer structure on a second surface the substrate to surround the contact pad.
Public/Granted literature
- US20130187287A1 Semiconductor Device and Method of Fabricating the Same Public/Granted day:2013-07-25
Information query
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