公开(公告)号：US10128168B2

公开(公告)日：2018-11-13

申请号：US14543688

申请日：2014-11-17

Applicant: Ju-il Choi ,  Kun-sang Park ,  Son-kwan Hwang ,  Ji-soon Park ,  Byung-lyul Park

Inventor： Ju-il Choi ,  Kun-sang Park ,  Son-kwan Hwang ,  Ji-soon Park ,  Byung-lyul Park

IPC: H01L23/532 ,  H01L23/48 ,  H01L23/31 ,  H01L25/065 ,  H01L21/768

Abstract: An integrated circuit (IC) device includes a semiconductor substrate having a via hole extending through at least a part thereof, a conductive structure in the via hole, a conductive barrier layer adjacent the conductive structure; and a via insulating layer interposed between the semiconductor substrate and the conductive barrier layer. The conductive barrier layer may include an outer portion oxidized between the conductive barrier layer and the via insulating layer, and the oxidized outer portion of the conductive barrier layer may substantially surrounds the remaining portion of the conductive barrier layer.

公开(公告)号：US20180076108A1

公开(公告)日：2018-03-15

申请号：US15481446

申请日：2017-04-06

Applicant: Kyoung Hwan KIM ,  Taewoo KANG ,  Byung Lyul PARK ,  Hyungjun JEON

Inventor： Kyoung Hwan KIM ,  Taewoo KANG ,  Byung Lyul PARK ,  Hyungjun JEON

IPC: H01L23/31 ,  H01L21/56 ,  H01L21/48 ,  H01L21/66 ,  H01L23/544 ,  H01L21/683 ,  H01L23/00

CPC classification number: H01L23/3128 ,  H01L21/4846 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L22/32 ,  H01L23/544 ,  H01L24/97 ,  H01L25/065 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2223/54426

Abstract: A method of manufacturing a semiconductor package includes forming a preliminary package, on a supporting substrate, which includes a connection substrate, a semiconductor chip and a molding pattern on the connection substrate and the semiconductor chip, forming a buffer pattern on the molding pattern, and forming a carrier substrate, on the buffer pattern, which includes a first portion contacting the buffer pattern and a second portion contacting the molding pattern.

公开(公告)号：US09852965B2

公开(公告)日：2017-12-26

申请号：US15204632

申请日：2016-07-07

Applicant: Ho-Jin Lee ,  Byung Lyul Park ,  Kwangjin Moon ,  Jisoon Park ,  Jin Ho An

Inventor： Ho-Jin Lee ,  Byung Lyul Park ,  Kwangjin Moon ,  Jisoon Park ,  Jin Ho An

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L2224/11 ,  H01L2224/16145 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Provided herein are semiconductor devices with through electrodes and methods of fabricating the same. The methods may include providing a semiconductor substrate having top and bottom surfaces facing each other, forming on the top surface of the semiconductor substrate a main via having a hollow cylindrical structure and a metal line connected to the main via, forming an interlayered insulating layer on the top surface of the semiconductor substrate to cover the main via and the metal line, removing a portion of the semiconductor substrate to form a via hole exposing a portion of a bottom surface of the main via, and forming in the via hole a through electrode that is electrically connected to the main via. The bottom surface of the main via is overlapped by a circumference of the via hole, when viewed in a plan view.

公开(公告)号：US09653430B2

公开(公告)日：2017-05-16

申请号：US14955124

申请日：2015-12-01

Applicant: Taeyeong Kim ,  Byung Lyul Park ,  Seokho Kim ,  Pil-Kyu Kang ,  Hyoju Kim ,  Jin Ho An ,  Joo Hee Jang

Inventor： Taeyeong Kim ,  Byung Lyul Park ,  Seokho Kim ,  Pil-Kyu Kang ,  Hyoju Kim ,  Jin Ho An ,  Joo Hee Jang

IPC: H01L25/065 ,  H01L21/66 ,  H01L23/00 ,  H01L23/48 ,  H01L23/528 ,  H01L23/31 ,  H01L21/683 ,  H01L21/768

CPC classification number: H01L25/0657 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/76898 ,  H01L22/32 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/73 ,  H01L24/80 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2224/03002 ,  H01L2224/03616 ,  H01L2224/0392 ,  H01L2224/04 ,  H01L2224/0557 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/08146 ,  H01L2224/09181 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/14515 ,  H01L2224/16146 ,  H01L2224/73251 ,  H01L2224/80201 ,  H01L2224/80203 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80907 ,  H01L2224/92 ,  H01L2224/9222 ,  H01L2224/94 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06596 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/80 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2224/08 ,  H01L2224/16 ,  H01L2924/00012 ,  H01L22/00 ,  H01L21/304 ,  H01L2221/68304 ,  H01L2221/68381 ,  H01L21/78

Abstract: Semiconductor devices having stacked structures and methods for fabricating the same are provided. A semiconductor device includes at least one single block including a first semiconductor chip and a second semiconductor chip stacked thereon. Each of the first and second semiconductor chips includes a semiconductor substrate including a through-electrode, a circuit layer on a front surface of the semiconductor substrate, and a front pad that is provided in the circuit layer and is electrically connected to the through-electrode. The surfaces of the semiconductor substrates face each other. The circuit layers directly contact each other such that the semiconductor chips are bonded to each other.

公开(公告)号：US09153522B2

公开(公告)日：2015-10-06

申请号：US14028523

申请日：2013-09-16

Applicant: Kwangjin Moon ,  SungHee Kang ,  Taeseong Kim ,  Byung Lyul Park ,  Yeun-Sang Park ,  Sukchul Bang

Inventor： Kwangjin Moon ,  SungHee Kang ,  Taeseong Kim ,  Byung Lyul Park ,  Yeun-Sang Park ,  Sukchul Bang

IPC: H01L23/48 ,  H01L23/532 ,  H01L25/065 ,  H01L21/768 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/481 ,  H01L21/30625 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/53238 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2224/05552

Abstract: Provided are semiconductor devices and methods of fabricating the same. The device may include a substrate including a first surface and a second surface opposing each other, a through-silicon-via (TSV) electrode provided in a via hole that may be formed to penetrate the substrate, and an integrated circuit provided adjacent to the through electrode on the first surface. The through electrode includes a metal layer filling a portion of the via hole and an alloy layer filling a remaining portion of the via hole. The alloy layer contains at least two metallic elements, one of which may be the same as that contained in the metal layer, and the other of which may be different from that contained in the metal layer.

Abstract translation: 提供半导体器件及其制造方法。 该器件可以包括包括彼此相对的第一表面和第二表面的衬底，设置在可以形成为穿透衬底的通孔中的穿硅通孔（TSV）电极，以及设置在邻近 通过第一表面上的电极。 贯通电极包括填充通孔的一部分的金属层和填充通孔的剩余部分的合金层。 合金层含有至少两种金属元素，其中之一可以与金属层中的金属元素相同，另一种可能与金属层中所含金属元素不同。

公开(公告)号：US20150279825A1

公开(公告)日：2015-10-01

申请号：US14669291

申请日：2015-03-26

Applicant: Pil-Kyu KANG ,  Byung Lyul PARK ,  Taeyeong KIM ,  Yeun-Sang PARK ,  Dosun LEE ,  Ho-Jin LEE ,  Jinho CHUN ,  Ju-il CHOI ,  Yi Koan HONG

Inventor： Pil-Kyu KANG ,  Byung Lyul PARK ,  Taeyeong KIM ,  Yeun-Sang PARK ,  Dosun LEE ,  Ho-Jin LEE ,  Jinho CHUN ,  Ju-il CHOI ,  Yi Koan HONG

IPC: H01L25/16 ,  H01L23/538 ,  H01L23/495 ,  H01L21/48 ,  H01L21/768 ,  H01L21/66 ,  H01L25/00 ,  H01L21/304

CPC classification number: H01L25/50 ,  H01L21/304 ,  H01L21/561 ,  H01L21/76898 ,  H01L22/32 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/08146 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06558 ,  H01L2225/06565 ,  H01L2225/06596 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor device having a chip stack and an interconnection terminal is provided. The chip stack includes a first semiconductor chip, a second semiconductor chip and a third semiconductor chip stacked on each other. The interconnection terminal is electrically coupled to the chip stack. The first semiconductor chip includes a first front surface and a first backside surface. The second semiconductor chip includes a second front surface, a second backside surface, a second circuit layer and a through-electrode which is electrically coupled to the second circuit layer and penetrates the second semiconductor chip. The third semiconductor chip includes a third front surface, a third backside surface opposite to the third front surface and a third circuit layer adjacent to the third front surface. The first front surface and the second front surface face each other. The third front surface and the second backside surface face each other.

Abstract translation: 提供具有芯片堆叠和互连端子的半导体器件。 芯片堆叠包括彼此堆叠的第一半导体芯片，第二半导体芯片和第三半导体芯片。 互连端子电耦合到芯片堆叠。 第一半导体芯片包括第一正面和第一背面。 第二半导体芯片包括电耦合到第二电路层并穿透第二半导体芯片的第二前表面，第二背面，第二电路层和贯通电极。 第三半导体芯片包括第三前表面，与第三前表面相对的第三背面和与第三前表面相邻的第三电路层。 第一前表面和第二前表面彼此面对。 第三前表面和第二后侧表面彼此面对。

公开(公告)号：US20150243637A1

公开(公告)日：2015-08-27

申请号：US14709840

申请日：2015-05-12

Applicant: Pil-Kyu Kang ,  Taeyeong Kim ,  Byung Lyul Park ,  Jumyong Park ,  Jinho Park ,  Kyu-Ha Lee ,  Deok-Young Jung ,  Gilheyun Choi

Inventor： Pil-Kyu Kang ,  Taeyeong Kim ,  Byung Lyul Park ,  Jumyong Park ,  Jinho Park ,  Kyu-Ha Lee ,  Deok-Young Jung ,  Gilheyun Choi

IPC: H01L25/065 ,  G11C8/00 ,  G11C16/08 ,  H01L23/544

Abstract: A conductive via of a semiconductor device is provided extending in a vertical direction through a substrate, a first end of the conductive via extending through a first surface of the substrate, so that the first end protrudes in the vertical direction relative to the first surface of the substrate. An insulating layer is provided on the first end of the conductive via and on the first surface of the substrate. An upper portion of a mask layer pattern is removed so that a capping portion of the insulating layer that is on the first end of the conductive via is exposed. A portion of the insulating layer at a side of, and spaced apart from, the conductive via, is removed, to form a recess in the insulating layer. The capping portion of the insulating layer on the first end of the conductive via is simultaneously removed.

Abstract translation: 提供半导体器件的导电通孔，其沿垂直方向穿过衬底延伸，导电通孔的第一端延伸穿过衬底的第一表面，使得第一端相对于衬底的第一表面在垂直方向上突出 底物。 绝缘层设置在导电通孔的第一端和基板的第一表面上。 除去掩模层图案的上部，使得在导电通孔的第一端上的绝缘层的封盖部分露出。 去除绝缘层的与导电通孔相隔一定距离的一部分，以在绝缘层中形成凹陷。 同时去除导电通孔第一端上的绝缘层的封盖部分。

公开(公告)号：US08963336B2

公开(公告)日：2015-02-24

申请号：US14333509

申请日：2014-07-16

Applicant: Deok-young Jung ,  Pil-kyu Kang ,  Byung-lyul Park ,  Ji-soon Park ,  Seong-min Son ,  Jin-ho An ,  Ji-hwang Kim

Inventor： Deok-young Jung ,  Pil-kyu Kang ,  Byung-lyul Park ,  Ji-soon Park ,  Seong-min Son ,  Jin-ho An ,  Ji-hwang Kim

IPC: H01L29/40 ,  H01L23/48

CPC classification number: H01L21/76898 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/561 ,  H01L21/568 ,  H01L23/291 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/17 ,  H01L24/81 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16237 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/83005 ,  H01L2224/83102 ,  H01L2224/9202 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2224/16145 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor device includes a substrate including a first surface and a second surface opposite to each other, a through-via electrode extending through the substrate. The through-via electrode has an interconnection metal layer and a barrier metal layer surrounding a side surface of the interconnection metal layer. One end of the through-via electrode protrudes above the second surface. A spacer insulating layer may be provided on an outer sidewall of the through-via electrode. A through-via electrode pad is connected to the through-via electrode and extends on the spacer insulating layer substantially parallel to the second surface. A first silicon oxide layer and a silicon nitride layer are stacked on the second surface. A thickness of the first silicon oxide layer is greater than a thickness of the silicon nitride layer.

Abstract translation: 半导体器件包括：基板，包括彼此相对的第一表面和第二表面;延伸穿过基板的通孔电极。 通孔电极具有互连金属层和围绕互连金属层的侧表面的阻挡金属层。 通孔电极的一端在第二表面上方突出。 间隔绝缘层可以设置在通孔电极的外侧壁上。 通孔电极焊盘连接到通孔电极并且在基本平行于第二表面的间隔绝缘层上延伸。 在第二表面上层叠第一氧化硅层和氮化硅层。 第一氧化硅层的厚度大于氮化硅层的厚度。

公开(公告)号：US08884440B2

公开(公告)日：2014-11-11

申请号：US13603978

申请日：2012-09-05

Applicant: Su-kyoung Kim ,  Gil-heyun Choi ,  Byung-lyul Park ,  Kwang-jin Moon ,  Kun-sang Park ,  Dong-chan Lim ,  Do-sun Lee

Inventor： Su-kyoung Kim ,  Gil-heyun Choi ,  Byung-lyul Park ,  Kwang-jin Moon ,  Kun-sang Park ,  Dong-chan Lim ,  Do-sun Lee

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40 ,  H01L23/538 ,  H01L21/768 ,  H01L25/065 ,  H01L23/498

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2924/13091 ,  H01L2924/00

Abstract: An integrated circuit device includes a substrate through which a first through-hole extends, and an interlayer insulating film on the substrate, the interlayer insulating film having a second through-hole communicating with the first through-hole. A Through-Silicon Via (TSV) structure is provided in the first through-hole and the second through-hole. The TSV structure extends to pass through the substrate and the interlayer insulating film. The TSV structure comprises a first through-electrode portion having a top surface located in the first through-hole, and a second through-electrode portion having a bottom surface contacting with the top surface of the first through-electrode portion and extending from the bottom surface to at least the second through-hole. Related fabrication methods are also described.

Abstract translation: 集成电路器件包括：第一通孔延伸穿过的衬底和衬底上的层间绝缘膜，所述层间绝缘膜具有与第一通孔连通的第二通孔。 在第一通孔和第二通孔中设置有硅通孔（TSV）结构。 TSV结构延伸穿过衬底和层间绝缘膜。 TSV结构包括具有位于第一通孔中的顶表面的第一通电极部分和具有与第一贯穿电极部分的顶表面接触并从底部延伸的底表面的第二通电极部分 表面至少到第二通孔。 还描述了相关的制造方法。

公开(公告)号：US20140021633A1

公开(公告)日：2014-01-23

申请号：US13919580

申请日：2013-06-17

Applicant: Do-Sun Lee ,  Kun-Sang Park ,  Byung-Lyul Park ,  Seong-min Son ,  Gil-heyun Choi

Inventor： Do-Sun Lee ,  Kun-Sang Park ,  Byung-Lyul Park ,  Seong-min Son ,  Gil-heyun Choi

IPC: H01L23/522

CPC classification number: H01L23/5226 ,  H01L21/2885 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05009 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/16146 ,  H01L2224/73104 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/00

Abstract: An integrated circuit device including a through-silicon-via (TSV) structure and methods of manufacturing the same are provided. The integrated circuit device may include the TSV structure penetrating through a semiconductor structure. The TSV structure may include a first through electrode unit including impurities of a first concentration and a second through electrode unit including impurities of a second concentration greater than the first concentration.

Abstract translation: 提供了一种包括贯穿硅通孔（TSV）结构的集成电路器件及其制造方法。 集成电路器件可以包括穿透半导体结构的TSV结构。 TSV结构可以包括包括第一浓度的杂质的第一通过电极单元和包括大于第一浓度的第二浓度的杂质的第二通过电极单元。