Invention Grant
US09076771B2 Varactor that applies bias voltage to two through wafer vias to determine capacitance of depletion region capacitor formed between the two through wafer vias
有权
将偏置电压施加到两个通过晶片通孔的变容二极管，以确定在两个通孔之间形成的耗尽区电容器的电容
- Patent Title: Varactor that applies bias voltage to two through wafer vias to determine capacitance of depletion region capacitor formed between the two through wafer vias
- Patent Title (中): 将偏置电压施加到两个通过晶片通孔的变容二极管，以确定在两个通孔之间形成的耗尽区电容器的电容
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Application No.: US13974909Application Date: 2013-08-23
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Publication No.: US09076771B2Publication Date: 2015-07-07
- Inventor: Sih-Han Li , Pei-Ling Tseng , Zhe-Hui Lin , Chih-Sheng Lin
- Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
- Applicant Address: TW Hsinchu
- Assignee: Industrial Technology Research Institute
- Current Assignee: Industrial Technology Research Institute
- Current Assignee Address: TW Hsinchu
- Priority: TW101150042A 20121226
- Main IPC: H01L29/93
- IPC: H01L29/93 ; H01L23/48 ; H01L27/08 ; H01L29/94
Abstract:
A varactor is provided. A substrate includes a first surface, a second surface and a first opening and a second opening in the substrate. A conductive material is filling the first and second openings, to form a first through-wafer via (TWV) and a second through-wafer via. A first capacitor is coupled between the first through-wafer via and a first terminal. A second capacitor is coupled between the second through-wafer via and a second terminal. A capacitance of a depletion-region capacitor between the first through-wafer via and the second through-wafer via is determined by a bias voltage applied to the first through-wafer via and the second through-wafer via.
Public/Granted literature
- US20140175606A1 VARACTOR Public/Granted day:2014-06-26
Information query
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