Invention Grant
US09117812B2 Semiconductor device and method of forming non-linear interconnect layer with extended length for joint reliability
有权
形成具有延长长度的非线性互连层的半导体器件和方法，用于接头可靠性
- Patent Title: Semiconductor device and method of forming non-linear interconnect layer with extended length for joint reliability
- Patent Title (中): 形成具有延长长度的非线性互连层的半导体器件和方法，用于接头可靠性
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Application No.: US14138382Application Date: 2013-12-23
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Publication No.: US09117812B2Publication Date: 2015-08-25
- Inventor: JaeHyun Lee , KiYoun Jang , KyungHoon Lee , TaeWoo Lee
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L23/12 ; H01L23/498 ; H01L21/768 ; H01L23/522 ; H01L23/532 ; H01L23/00 ; H01L23/31 ; H01L21/48 ; H01L21/56
Abstract:
A semiconductor device has a substrate and first conductive layer formed over the substrate. An insulating layer is formed over the first substrate with an opening over the first conductive layer. A second conductive layer is formed within the opening of the insulating layer. A portion of the second conductive layer is removed to expose a horizontal surface and side surfaces of the second conductive layer below a surface of the insulating layer. The second conductive layer has non-linear surfaces to extend a contact area of the second conductive layer. The horizontal surface and side surfaces can be stepped surfaces or formed as a ring. A third conductive layer is formed over the second conductive layer. A plurality of bumps is formed over the horizontal surface and side surfaces of the second conductive layer. A semiconductor die is mounted to the substrate.
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