Invention Grant
US09122169B2 Mask layout patterns for closely spaced primitives in phase shift photolithography masks
有权
在相移光刻掩模中用于紧密间隔的基元的掩模布局图案
- Patent Title: Mask layout patterns for closely spaced primitives in phase shift photolithography masks
- Patent Title (中): 在相移光刻掩模中用于紧密间隔的基元的掩模布局图案
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Application No.: US13977638Application Date: 2011-12-29
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Publication No.: US09122169B2Publication Date: 2015-09-01
- Inventor: Bin Hu , Vivek K. Singh , Sungwon Kim , Chulwoo Oh , Mehmet E. Yavuz
- Applicant: Bin Hu , Vivek K. Singh , Sungwon Kim , Chulwoo Oh , Mehmet E. Yavuz
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- International Application: PCT/US2011/067978 WO 20111229
- International Announcement: WO2013/101129 WO 20130704
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G03F1/68 ; G03F1/26 ; G03F1/70

Abstract:
Improved mask layout patterns are described for closely spaced primitives in phase shift photolithography masks. In one example, at least a portion of a photolithography mask layout is decomposed into primitives. Jogs are identified from among the primitives, the jogs being characterized by three adjacent corners. E-fields are determined for the identified jogs and are applied to synthesize an electric field at a substrate. The mask layout is corrected using the synthesized electric field and a printed wafer pattern is calculated.
Public/Granted literature
- US20140302427A1 MASK LAYOUT PATTERNS FOR CLOSELY SPACED PRIMITIVES IN PHASE SHIFT PHOTOLITHOGRAPHY MASKS Public/Granted day:2014-10-09
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