Invention Grant
- Patent Title: Detecting and correcting hard errors in a memory array
- Patent Title (中): 检测和纠正存储器阵列中的硬错误
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Application No.: US14048830Application Date: 2013-10-08
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Publication No.: US09189326B2Publication Date: 2015-11-17
- Inventor: John Kalamatianos , Johnsy Kanjirapallil John , Robert Gelinas , Vilas K. Sridharan , Phillip E. Nevius
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C29/52 ; G11C29/42 ; G11C11/41 ; G11C29/04

Abstract:
Hard errors in the memory array can be detected and corrected in real-time using reusable entries in an error status buffer. Data may be rewritten to a portion of a memory array and a register in response to a first error in data read from the portion of the memory array. The rewritten data may then be written from the register to an entry of an error status buffer in response to the rewritten data read from the register differing from the rewritten data read from the portion of the memory array.
Public/Granted literature
- US20150100848A1 DETECTING AND CORRECTING HARD ERRORS IN A MEMORY ARRAY Public/Granted day:2015-04-09
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