Provided is an operation method applicable to a resistive memory cell including a transistor and a resistive memory element. The operation method includes: in a programming operation, generating a programming current flowing through the transistor and the resistive memory element so that a resistance state of the resistive memory element changes from a first resistance state into a second resistance state; and in an erase operation, generating an erase current from a well region of the transistor to the resistive memory element but keeping the erase current from flowing through the transistor, so that the resistance state of the resistive memory element changes from the second resistance state into the first resistance state.