发明授权
US09202789B2 Die package comprising die-to-wire connector and a wire-to-die connector configured to couple to a die package
有权
芯片封装包括管芯到芯线连接器和配置成耦合到管芯封装的线对管芯连接器
- 专利标题： Die package comprising die-to-wire connector and a wire-to-die connector configured to couple to a die package
- 专利标题（中）： 芯片封装包括管芯到芯线连接器和配置成耦合到管芯封装的线对管芯连接器
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申请号： US14254764申请日： 2014-04-16
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公开(公告)号： US09202789B2公开(公告)日： 2015-12-01
- 发明人: Daeik Daniel Kim , Mario Francisco Velez , Jonghae Kim , Matthew Michael Nowak , Chengjie Zuo , Changhan Hobie Yun , David Francis Berdy , Robert Paul Mikulka
- 申请人： QUALCOMM Incorporated
- 申请人地址： US CA San Diego
- 专利权人： QUALCOMM Incorporated
- 当前专利权人： QUALCOMM Incorporated
- 当前专利权人地址： US CA San Diego
- 代理机构： Loza & Loza, LLP
- 主分类号： H01L23/48
- IPC分类号： H01L23/48 ; H01L23/552 ; H01L23/31 ; H01L23/00 ; H01L23/498 ; H01L23/04 ; H01L23/538 ; H05K9/00
摘要：
Some novel features pertain to an integrated device package (e.g., die package) that includes a package substrate, a die, an encapsulation layer and a first set of metal layers. The package substrate includes a first surface and a second surface. The die is coupled to the first surface of the package substrate. The encapsulation layer encapsulates the die. The first set of metal layers is coupled to a first exterior surface of the encapsulation layer. In some implementations, the first set of metal layers is configured to operate as a die-to-wire connector of the integrated device package. In some implementations, the integrated device package includes a second set of metal layers coupled to the second surface of the package substrate. In some implementations, the integrated device package includes a second set of metal layers coupled to a second exterior surface of the encapsulation layer.
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