Invention Grant
- Patent Title: Resonant clock amplifier with a digitally tunable delay
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Application No.: US14080733Application Date: 2013-11-14
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Publication No.: US09231571B2Publication Date: 2016-01-05
- Inventor: Bharath Raghavan , Jun Cao , Afshin Momtaz
- Applicant: Broadcom Corporation
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: McDermott Will & Emery LLP
- Main IPC: H04J3/04
- IPC: H04J3/04 ; H03K5/07 ; H03M9/00 ; H04L7/02 ; H03K5/00 ; H04L7/00 ; H04L7/027 ; H04L7/033

Abstract:
A programmable frequency receiver includes a slicer for receiving data at a first frequency, a de-multiplexer for de-multiplexing the data at a second frequency, a programmable clock generator for generating a clock at the first frequency, and first and second resonant clock amplifiers for amplifying clock signals at the first and second frequencies. The resonant clock amplifiers include an inductor having a low Q value, allowing them to amplify clock signals over the programmable frequency range of the receiver. The second resonant clock amplifier includes digitally tunable delay elements to delay and center the amplified clock signal of the second frequency in the data window at the interface between the slicer and the de-multiplexer. The delay elements can be capacitors. A calibration circuit adjusts capacitive elements within a master clock generator to generate a master clock at the first frequency.
Public/Granted literature
- US20140079169A1 RESONANT CLOCK AMPLIFIER WITH A DIGITALLY TUNABLE DELAY Public/Granted day:2014-03-20
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