公开(公告)号：US09231571B2

公开(公告)日：2016-01-05

申请号：US14080733

申请日：2013-11-14

Applicant: Broadcom Corporation

Inventor： Bharath Raghavan ,  Jun Cao ,  Afshin Momtaz

IPC: H04J3/04 ,  H03K5/07 ,  H03M9/00 ,  H04L7/02 ,  H03K5/00 ,  H04L7/00 ,  H04L7/027 ,  H04L7/033

CPC classification number: H03K5/07 ,  H03K2005/00071 ,  H03K2005/00208 ,  H03M9/00 ,  H04L7/0079 ,  H04L7/02 ,  H04L7/027 ,  H04L7/033

Abstract: A programmable frequency receiver includes a slicer for receiving data at a first frequency, a de-multiplexer for de-multiplexing the data at a second frequency, a programmable clock generator for generating a clock at the first frequency, and first and second resonant clock amplifiers for amplifying clock signals at the first and second frequencies. The resonant clock amplifiers include an inductor having a low Q value, allowing them to amplify clock signals over the programmable frequency range of the receiver. The second resonant clock amplifier includes digitally tunable delay elements to delay and center the amplified clock signal of the second frequency in the data window at the interface between the slicer and the de-multiplexer. The delay elements can be capacitors. A calibration circuit adjusts capacitive elements within a master clock generator to generate a master clock at the first frequency.

公开(公告)号：US20160315641A1

公开(公告)日：2016-10-27

申请号：US14715862

申请日：2015-05-19

Applicant: Broadcom Corporation

Inventor： Bharath Raghavan

IPC: H04B1/04

CPC classification number: H04B1/0475 ,  H03F3/2173 ,  H03F3/45183 ,  H03F3/45659 ,  H03F2200/459 ,  H03F2203/45008 ,  H03F2203/45082 ,  H04B2215/069

Abstract: In some aspects, the disclosure is directed to methods and systems for common-mode ripple correction for high-speed transmitters. In one or more embodiments, the system includes a driver circuit of a complementary metal-oxide semiconductor (CMOS) transmitter. In one or more embodiments, the driver circuit has an output common-mode. In one or more embodiments, the system includes a predriver circuit with an output in electrical communication with an input of the driver circuit. In one or more embodiments, a comparator generates a control signal using a difference between an average signal value of the output common-mode and a target value. In one or more embodiments, the comparator block generates signals which can be used to adjust the strength of at least one of a pull-up path or a pull-down path in the predriver circuit.

Abstract translation: 在一些方面，本公开涉及用于高速发射机的共模纹波校正的方法和系统。 在一个或多个实施例中，该系统包括互补金属氧化物半导体（CMOS）发射器的驱动器电路。 在一个或多个实施例中，驱动器电路具有输出共模。 在一个或多个实施例中，该系统包括具有与驱动器电路的输入电连通的输出的预驱动电路。 在一个或多个实施例中，比较器使用输出共模的平均信号值和目标值之间的差产生控制信号。 在一个或多个实施例中，比较器块产生可用于调节预驱动电路中的上拉路径或下拉路径中的至少一个的强度的信号。