Invention Grant
- Patent Title: Method of manufacturing semiconductor device having doped layer
- Patent Title (中): 制造具有掺杂层的半导体器件的方法
-
Application No.: US14276213Application Date: 2014-05-13
-
Publication No.: US09236259B2Publication Date: 2016-01-12
- Inventor: Eun-Young Jo , Jong-Hoon Kang , Tae-Gon Kim , Han-Mei Choi
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2013-0060504 20130528
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/225 ; H01L21/8238 ; H01L29/66

Abstract:
A method of manufacturing a semiconductor device having a doped layer may be provided. The method includes providing a substrate having a first region and a second region, forming a gate dielectric layer on the substrate, forming a first gate electrode layer on the gate dielectric layer, forming a first doped layer on the first gate electrode layer, forming a first capping layer on the first doped layer, forming a mask pattern on the first capping layer in the first region, the mask pattern exposing the first capping layer in the second region, removing the first capping layer and the first doped layer in the second region, removing the mask pattern, and forming a second doped layer on the first capping layer in the first region and the first gate electrode layer in the second region.
Public/Granted literature
- US20140357071A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING DOPED LAYER Public/Granted day:2014-12-04
Information query
IPC分类: