Invention Grant
- Patent Title: Method of fabricating semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US14492382Application Date: 2014-09-22
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Publication No.: US09275863B2Publication Date: 2016-03-01
- Inventor: Sumito Numazawa , Yoshito Nakazawa , Masayoshi Kobayashi , Satoshi Kudo , Yasuo Imai , Sakae Kubo , Takashi Shigematsu , Akihiro Ohnishi , Kozo Uesawa , Kentaro Oishi
- Applicant: RENESAS ELECTRONICS CORPORATION , HITACHI ULSI SYSTEMS CO., LTD.
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Mattingly & Malur, PC
- Priority: JP09-232425 19970828
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/28 ; H01L29/66 ; H01L29/78 ; H01L29/06 ; H01L29/08 ; H01L29/423 ; H01L29/51

Abstract:
In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
Public/Granted literature
- US20150011081A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE Public/Granted day:2015-01-08
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