Invention Grant
- Patent Title: Resistance correction circuit, resistance correction method, and semiconductor device
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Application No.: US14560013Application Date: 2014-12-04
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Publication No.: US09281780B2Publication Date: 2016-03-08
- Inventor: Kosuke Yayama , Takashi Nakamura
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2012-240532 20121031
- Main IPC: H01C13/02
- IPC: H01C13/02 ; H03B5/24 ; H01L27/08 ; H01L49/02

Abstract:
Disclosed is a semiconductor device that suppresses stress-induced resistance value changes. The semiconductor device includes a resistance correction circuit. The resistance correction circuit includes a first resistor whose stress-resistance value relationship is a first relationship, a second resistor whose stress-resistance value relationship is a second relationship, and a correction section that controls the resistance value of a correction target resistor. The correction section detects the difference between the resistance value of the first resistor and the resistance value of the second resistor and corrects, in accordance with the result of detection, the resistance value of the correction target resistor.
Public/Granted literature
- US20150162874A1 RESISTANCE CORRECTION CIRCUIT, RESISTANCE CORRECTION METHOD, AND SEMICONDUCTOR DEVICE Public/Granted day:2015-06-11
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