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公开(公告)号：US09829911B2
公开(公告)日：2017-11-28
申请号：US15007842
申请日：2016-01-27
Applicant: Renesas Electronics Corporation
Inventor： Kosuke Yayama , Takashi Nakamura
CPC classification number: G06F1/08 , H01C13/02 , H01L27/0802 , H01L28/20 , H03B5/24
Abstract: Disclosed is a semiconductor device that suppresses stress-induced resistance value changes. The semiconductor device includes a resistance correction circuit. The resistance correction circuit includes a first resistor whose stress-resistance value relationship is a first relationship, a second resistor whose stress-resistance value relationship is a second relationship, and a correction section that controls the resistance value of a correction target resistor. The correction section detects the difference between the resistance value of the first resistor and the resistance value of the second resistor and corrects, in accordance with the result of detection, the resistance value of the correction target resistor.
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公开(公告)号：US09281780B2
公开(公告)日：2016-03-08
申请号：US14560013
申请日：2014-12-04
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Kosuke Yayama , Takashi Nakamura
CPC classification number: G06F1/08 , H01C13/02 , H01L27/0802 , H01L28/20 , H03B5/24
Abstract: Disclosed is a semiconductor device that suppresses stress-induced resistance value changes. The semiconductor device includes a resistance correction circuit. The resistance correction circuit includes a first resistor whose stress-resistance value relationship is a first relationship, a second resistor whose stress-resistance value relationship is a second relationship, and a correction section that controls the resistance value of a correction target resistor. The correction section detects the difference between the resistance value of the first resistor and the resistance value of the second resistor and corrects, in accordance with the result of detection, the resistance value of the correction target resistor.
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公开(公告)号：US11450731B2
公开(公告)日：2022-09-20
申请号：US17154775
申请日：2021-01-21
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Chiemi Hashimoto , Kosuke Yayama , Hidekazu Tawara
IPC: H01L27/06 , H01L49/02 , H03B5/24 , H01F7/06 , H01L23/522
Abstract: A resistance element includes a conductor, the conductor having a repeating pattern of: a first conductive layer formed on a first interlayer insulating layer on a semiconductor substrate; a second conductive layer formed on a second interlayer insulating layer different from the first interlayer insulating layer; and an interlayer conductive layer connecting the first conductive layer and the second conductive layer, and the second conductive layer has a resistance-value fluctuation characteristic opposite to a resistance-value fluctuation characteristic of the first conductive layer after a heat treatment.
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公开(公告)号：US10530297B2
公开(公告)日：2020-01-07
申请号：US15928948
申请日：2018-03-22
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Guoqiang Zhang , Kosuke Yayama
Abstract: A semiconductor device includes a reference voltage generation circuit configured to generate reference voltages Va and Vb capable of adjusting a primary temperature characteristic, and an oscillation circuit configured to output an oscillation signal using the reference voltages Va and Vb, in which the oscillation circuit includes a frequency/current conversion circuit that is driven by the reference voltage Va and outputs a current Ie in accordance with a frequency of a feedback signal, a control voltage generation circuit configured to generate a control voltage in accordance with a potential difference between a voltage in accordance with the current Ie and the reference voltage Vb, a voltage control oscillation circuit configured to output the oscillation signal having a frequency in accordance with the control voltage, and a frequency division circuit configured to divide a frequency of the oscillation signal and output the resulting signal as the feedback signal.
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公开(公告)号：US09587994B2
公开(公告)日：2017-03-07
申请号：US14805624
申请日：2015-07-22
Applicant: Renesas Electronics Corporation
Inventor： Kosuke Yayama
CPC classification number: G01K15/005 , G01K7/01
Abstract: There is provided a semiconductor device which can provide desired output characteristics suitable to applications. A semiconductor device 10 includes a temperature sensing unit 11 which generates an analog sensing signal corresponding to a temperature, and an AD converter unit 12 which converts the analog sensing signal into a digital output signal corresponding to an adjusted temperature change rate based on a temperature change rate adjustment signal for adjusting the temperature change rate. The temperature change rate refers to a change in a detected temperature per bit of a digital output signal.
Abstract translation: 提供了可以提供适合于应用的期望的输出特性的半导体器件。 半导体装置10包括产生对应于温度的模拟感测信号的温度检测单元11以及将模拟感测信号转换为对应于基于温度变化的调节温度变化率的数字输出信号的AD转换单元12 速率调节信号，用于调节温度变化率。 温度变化率是指数字输出信号每位检测温度的变化。
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Patent Agency Ranking
6.发明授权Resistance correction circuit, resistance correction method, and semiconductor device 有权电阻校正电路，电阻校正方法和半导体器件公开(公告)号：US08970266B2
公开(公告)日：2015-03-03
申请号：US14066731
申请日：2013-10-30
Applicant: Renesas Electronics Corporation
Inventor： Kosuke Yayama , Takashi Nakamura
CPC classification number: G06F1/08 , H01C13/02 , H01L27/0802 , H01L28/20 , H03B5/24
Abstract: Disclosed is a semiconductor device that suppresses stress-induced resistance value changes. The semiconductor device includes a resistance correction circuit. The resistance correction circuit includes a first resistor whose stress-resistance value relationship is a first relationship, a second resistor whose stress-resistance value relationship is a second relationship, and a correction section that controls the resistance value of a correction target resistor. The correction section detects the difference between the resistance value of the first resistor and the resistance value of the second resistor and corrects, in accordance with the result of detection, the resistance value of the correction target resistor.
Abstract translation: 公开了抑制应力诱导电阻值变化的半导体装置。 半导体器件包括电阻校正电路。 电阻校正电路包括其应力电阻值关系为第一关系的第一电阻器，其应力电阻值关系为第二关系的第二电阻器和控制校正目标电阻器的电阻值的校正部件。 校正部分检测第一电阻器的电阻值和第二电阻器的电阻值之间的差异，并根据检测结果校正校正目标电阻器的电阻值。
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公开(公告)号：US10958250B2
公开(公告)日：2021-03-23
申请号：US16004014
申请日：2018-06-08
Applicant: Renesas Electronics Corporation
Inventor： Chiemi Hashimoto , Kosuke Yayama , Katsumi Tsuneno , Tomokazu Matsuzaki
IPC: H01L21/00 , H03K3/011 , H01L23/522 , H01L27/08 , H01L49/02 , H03K3/356 , H01L23/532
Abstract: A polycrystalline silicon resistor is large in coefficient of fluctuation in resistance between before and after the completion of a package molding process. To enable highly accurate trimming, it is desired to implement a resistor that is hardly subjected to stress produced in a substrate during a package molding process. A resistance element is formed of a plurality of wiring layers and has a repetitive pattern of a first conductive layer formed in a first wiring layer, a second conductive layer formed in a second wiring layer, and an interlayer conductive layer coupling the first conductive layer and the second conductive layer together.
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公开(公告)号：US09276585B2
公开(公告)日：2016-03-01
申请号：US14244800
申请日：2014-04-03
Applicant: Renesas Electronics Corporation
Inventor： Takashi Nakamura , Kosuke Yayama , Masaaki Iijima
CPC classification number: H03L7/0991 , H03L1/022 , H03L7/00 , H03L7/02 , H03L7/06 , H03L7/099 , H03L7/16 , H03L7/22 , H03L2207/06 , H03L2207/50
Abstract: A frequency-locked loop circuit has a digital control oscillator that generates a clock, and an FLL controller that generates a frequency control code to control an oscillation frequency of the clock. The FLL controller has a frequency comparison unit and a delay code control unit. The frequency comparison unit compares a frequency of a clock generated by the digital control oscillator with a frequency of a multiplied reference clock. The delay code control unit generates, based on a comparison result of the frequency comparison unit, the frequency control code so that the frequency of the clock generated by the digital control oscillator matches the frequency of the multiplied reference clock. The frequency comparison unit determines the frequency of the clock by using first and second thresholds. The delay code control unit generates the frequency control code according to a determination of the frequency comparison unit.
Abstract translation: 锁频环路电路具有产生时钟的数字控制振荡器和产生用于控制时钟的振荡频率的频率控制码的FLL控制器。 FLL控制器具有频率比较单元和延迟码控制单元。 频率比较单元将由数字控制振荡器产生的时钟的频率与相乘的参考时钟的频率进行比较。 延迟码控制单元基于频率比较单元的比较结果生成频率控制码，使得由数字控制振荡器产生的时钟的频率与倍增的参考时钟的频率相匹配。 频率比较单元通过使用第一和第二阈值来确定时钟的频率。 延迟码控制单元根据频率比较单元的判定来生成频率控制码。
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9.发明申请RESISTANCE CORRECTION CIRCUIT, RESISTANCE CORRECTION METHOD, AND SEMICONDUCTOR DEVICE 有权电阻校正电路，电阻校正方法和半导体器件公开(公告)号：US20150162874A1
公开(公告)日：2015-06-11
申请号：US14560013
申请日：2014-12-04
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Kosuke Yayama , Takashi Nakamura
IPC: H03B5/24
CPC classification number: G06F1/08 , H01C13/02 , H01L27/0802 , H01L28/20 , H03B5/24
Abstract: Disclosed is a semiconductor device that suppresses stress-induced resistance value changes. The semiconductor device includes a resistance correction circuit. The resistance correction circuit includes a first resistor whose stress-resistance value relationship is a first relationship, a second resistor whose stress-resistance value relationship is a second relationship, and a correction section that controls the resistance value of a correction target resistor. The correction section detects the difference between the resistance value of the first resistor and the resistance value of the second resistor and corrects, in accordance with the result of detection, the resistance value of the correction target resistor.
Abstract translation: 公开了抑制应力诱导电阻值变化的半导体装置。 半导体器件包括电阻校正电路。 电阻校正电路包括其应力电阻值关系为第一关系的第一电阻器，其应力电阻值关系为第二关系的第二电阻器和控制校正目标电阻器的电阻值的校正部件。 校正部分检测第一电阻器的电阻值和第二电阻器的电阻值之间的差异，并根据检测结果校正校正目标电阻器的电阻值。
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10.发明申请RESISTANCE CORRECTION CIRCUIT, RESISTANCE CORRECTION METHOD, AND SEMICONDUCTOR DEVICE 有权电阻校正电路，电阻校正方法和半导体器件公开(公告)号：US20140118060A1
公开(公告)日：2014-05-01
申请号：US14066731
申请日：2013-10-30
Applicant: Renesas Electronics Corporation
Inventor： Kosuke Yayama , Takashi Nakamura
IPC: H01L27/00
CPC classification number: G06F1/08 , H01C13/02 , H01L27/0802 , H01L28/20 , H03B5/24
Abstract: Disclosed is a semiconductor device that suppresses stress-induced resistance value changes. The semiconductor device includes a resistance correction circuit. The resistance correction circuit includes a first resistor whose stress-resistance value relationship is a first relationship, a second resistor whose stress-resistance value relationship is a second relationship, and a correction section that controls the resistance value of a correction target resistor. The correction section detects the difference between the resistance value of the first resistor and the resistance value of the second resistor and corrects, in accordance with the result of detection, the resistance value of the correction target resistor.
Abstract translation: 公开了抑制应力诱发电阻值变化的半导体装置。 该半导体器件包括电阻校正电路。 电阻校正电路包括其应力电阻值关系为第一关系的第一电阻器，其应力电阻值关系为第二关系的第二电阻器和控制校正目标电阻器的电阻值的校正部件。 校正部分检测第一电阻器的电阻值和第二电阻器的电阻值之间的差异，并根据检测结果校正校正目标电阻器的电阻值。
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