A phase-locked loop circuit includes a phase detector, a charge pump, a capacitor, and a capacitor multiplier. The phase detector receives a reference frequency and a feedback frequency to generate a up/down signal. The charge pump, which includes a positive node and a negative node, receives the up/down signal to generate a first current. The capacitor is coupled to the negative node. The capacitor multiplier, coupled to the negative node, generates a second current which is the first current divided by a first scaling number.