Invention Grant
- Patent Title: Patterning transition metals in integrated circuits
- Patent Title (中): 集成电路中的过渡金属图案化
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Application No.: US13707003Application Date: 2012-12-06
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Publication No.: US09299638B2Publication Date: 2016-03-29
- Inventor: Cyril Cabral, Jr. , Sebastian U. Engelmann , Benjamin L. Fletcher , Michael S. Gordon , Eric A. Joseph
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Thompson Hine LLP
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L23/48 ; H01L29/45 ; H01L21/768 ; H01L23/532 ; B82Y99/00 ; B82Y40/00
Abstract:
Fabricating conductive lines in an integrated circuit includes patterning a layer of a transition metal to form the conductive lines and depositing a protective cap on at least some of the one or more conductive lines. Alternatively, fabricating conductive lines in an integrated circuit includes patterning a layer of a transition metal to form the conductive lines, wherein the conductive lines have sub-eighty nanometer pitches, and depositing a protective cap on at least some of the conductive lines, wherein the protective cap has a thickness between approximately five and fifteen nanometers. Alternatively, fabricating conductive lines in an integrated circuit includes patterning a layer of a transition metal to form the conductive lines, wherein the conductive lines have sub-eighty nanometer line widths, and depositing a protective cap on at least some of the conductive lines, wherein the protective cap has a thickness between approximately five and fifteen nanometers.
Public/Granted literature
- US20140159227A1 PATTERNING TRANSITION METALS IN INTEGRATED CIRCUITS Public/Granted day:2014-06-12
Information query
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