Invention Grant
- Patent Title: Systems and methods to enhance passivation integrity
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Application No.: US14791555Application Date: 2015-07-06
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Publication No.: US09349688B2Publication Date: 2016-05-24
- Inventor: Ying-Chieh Liao , Han-Wei Yang , Chen-Chung Lai , Kang-Min Kuo , Bor-Zen Tien
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L23/00 ; H01L23/48 ; H01L21/768 ; H01L23/482 ; H01L23/522 ; H01L29/40 ; H01L23/31 ; H01L23/29
Abstract:
A semiconductor device having enhanced passivation integrity is disclosed. The device includes a substrate, a first layer, and a metal layer. The first layer is formed over the substrate. The first layer includes a via opening and a tapered portion proximate to the via opening. The metal layer is formed over the via opening and the tapered portion of the first layer. The metal layer is substantially free from gaps and voids.
Public/Granted literature
- US20150311156A1 SYSTEMS AND METHODS TO ENHANCE PASSIVATION INTEGRITY Public/Granted day:2015-10-29
Information query
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