Invention Grant
US09349734B2 Selective FuSi gate formation in gate first CMOS technologies
有权
栅极第一CMOS技术中的选择性富Si栅极形成
- Patent Title: Selective FuSi gate formation in gate first CMOS technologies
- Patent Title (中): 栅极第一CMOS技术中的选择性富Si栅极形成
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Application No.: US14475720Application Date: 2014-09-03
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Publication No.: US09349734B2Publication Date: 2016-05-24
- Inventor: Peter Javorka , Stefan Flachowsky , Gerd Zschätzsch
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L27/092 ; H01L29/78 ; H01L29/49 ; H01L29/66 ; H01L21/8238 ; H01L21/02 ; H01L21/308 ; H01L21/311 ; H01L27/06

Abstract:
The present disclosure provides a method of forming a semiconductor device structure with selectively fabricating semiconductor device structures having fully silicided (FuSi) gates and partially silicided gates. In aspects of the present disclosure, a semiconductor device structure with a first semiconductor device and a second semiconductor device is provided, wherein each of the first and second semiconductor devices includes a gate structure over an active region, each of the gate structures having a gate electrode material and a gate dielectric material. The gate electrode material of the first semiconductor device is recessed, resulting in a recessed first gate electrode material which is fully silicided during a subsequent silicidation process. On the gate electrode material of the second semiconductor device, a silicide portion is formed during the silicidation process.
Public/Granted literature
- US20160064382A1 SELECTIVE FuSi GATE FORMATION IN GATE FIRST CMOS TECHNOLOGIES Public/Granted day:2016-03-03
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