Invention Grant
- Patent Title: Lateral silicon-on-insulator bipolar junction transistor process and structure
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Application No.: US14677460Application Date: 2015-04-02
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Publication No.: US09397203B2Publication Date: 2016-07-19
- Inventor: John Z. Colt, Jr. , John J. Ellis-Monaghan , Leah M. Pastel , Steven M. Shank
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/737 ; H01L29/735 ; H01L29/06 ; H01L29/10 ; H01L29/08 ; H01L29/73

Abstract:
Device structures, fabrication methods, and design structures for a bipolar junction transistor. A first terminal of the bipolar junction transistor is formed from a section of a device layer of a semiconductor-on-insulator wafer. An intrinsic base of the bipolar junction transistor is formed from an epitaxially-grown section of a first semiconductor layer, which is coextensive with a sidewall of the section of the device layer. A second terminal of the bipolar junction transistor is formed from a second semiconductor layer that is coextensive with the epitaxially-grown section of the first semiconductor layer. The epitaxially-grown section of a first semiconductor layer defines a first junction with the section of the device layer, and the second semiconductor layer defines a second junction with the epitaxially-grown section of the first semiconductor layer.
Public/Granted literature
- US20150214346A1 LATERAL SILICON-ON-INSULATOR BIPOLAR JUNCTION TRANSISTOR PROCESS AND STRUCTURE Public/Granted day:2015-07-30
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