Invention Grant
- Patent Title: Integration method for fabrication of metal gate based multiple threshold voltage devices and circuits
- Patent Title (中): 基于金属栅极的多阈值电压器件和电路的集成方法
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Application No.: US14188898Application Date: 2014-02-25
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Publication No.: US09455201B2Publication Date: 2016-09-27
- Inventor: Manoj Joshi , Manfred Eller , Rohit Pal , Richard J. Carter , Srikanth Balaji Samavedam , Bongki Lee , Jin Ping Liu
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Heslin, Rothenberg, Farley & Mesiti P.C.
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/088 ; H01L21/8234 ; H01L27/092

Abstract:
In one aspect there is set forth herein a semiconductor device having a first field effect transistor formed in a substrate structure, and a second field effect transistor formed in the substrate structure. The first field effect transistor can include a first substrate structure doping, a first gate stack, and a first threshold voltage. The second field effect transistor can include the first substrate structure doping, a second gate stack different from the first gate stack, and a second threshold voltage different from the first threshold voltage.
Public/Granted literature
- US20150243652A1 INTEGRATION METHOD FOR FABRICATION OF METAL GATE BASED MULTIPLE THRESHOLD VOLTAGE DEVICES AND CIRCUITS Public/Granted day:2015-08-27
Information query
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