Invention Grant
- Patent Title: Mechanism for facilitating dynamic and efficient management of instruction atomicity violations in software programs at computing systems
- Patent Title (中): 促进计算系统软件程序中指令原子性违规的动态和有效管理的机制
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Application No.: US13977690Application Date: 2013-03-15
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Publication No.: US09501340B2Publication Date: 2016-11-22
- Inventor: Nathan D. Dautenhahn , Justin E. Gottschlich , Gilles Pokam , Cristiano L. Pereira , Shiliang Hu , Klaus Danne , Rolf Kassa
- Applicant: Nathan D. Dautenhahn , Justin E. Gottschlich , Gilles Pokam , Cristiano L. Pereira , Shiliang Hu , Klaus Danne , Rolf Kassa
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- International Application: PCT/US2013/032640 WO 20130315
- International Announcement: WO2014/143059 WO 20140918
- Main IPC: G06F9/45
- IPC: G06F9/45 ; G06F11/07 ; G06F9/38 ; G06F11/14

Abstract:
A mechanism is described for facilitating dynamic and efficient management of instruction atomicity violations in software programs according to one embodiment. A method of embodiments, as described herein, includes receiving, at a replay logic from a recording system, a recording of a first software thread running a first macro instruction, and a second software thread running a second macro instruction. The first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device. The recording system may record interleavings between the first and second macro instructions. The method includes correctly replaying the recording of the interleavings of the first and second macro instructions precisely as they occurred. The correctly replaying may include replaying a local memory state of the first and second macro instructions and a global memory state of the first and second software threads.
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