发明授权
- 专利标题: Mechanism for facilitating dynamic and efficient management of instruction atomicity violations in software programs at computing systems
- 专利标题(中): 促进计算系统软件程序中指令原子性违规的动态和有效管理的机制
-
申请号: US13977690申请日: 2013-03-15
-
公开(公告)号: US09501340B2公开(公告)日: 2016-11-22
- 发明人: Nathan D. Dautenhahn , Justin E. Gottschlich , Gilles Pokam , Cristiano L. Pereira , Shiliang Hu , Klaus Danne , Rolf Kassa
- 申请人: Nathan D. Dautenhahn , Justin E. Gottschlich , Gilles Pokam , Cristiano L. Pereira , Shiliang Hu , Klaus Danne , Rolf Kassa
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 国际申请: PCT/US2013/032640 WO 20130315
- 国际公布: WO2014/143059 WO 20140918
- 主分类号: G06F9/45
- IPC分类号: G06F9/45 ; G06F11/07 ; G06F9/38 ; G06F11/14
摘要:
A mechanism is described for facilitating dynamic and efficient management of instruction atomicity violations in software programs according to one embodiment. A method of embodiments, as described herein, includes receiving, at a replay logic from a recording system, a recording of a first software thread running a first macro instruction, and a second software thread running a second macro instruction. The first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device. The recording system may record interleavings between the first and second macro instructions. The method includes correctly replaying the recording of the interleavings of the first and second macro instructions precisely as they occurred. The correctly replaying may include replaying a local memory state of the first and second macro instructions and a global memory state of the first and second software threads.
公开/授权文献
信息查询