Invention Grant
- Patent Title: Using wafer geometry to improve scanner correction effectiveness for overlay control
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Application No.: US14683880Application Date: 2015-04-10
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Publication No.: US09513565B2Publication Date: 2016-12-06
- Inventor: Craig MacNaughton , Sathish Veeraraghavan , Pradeep Vukkadala , Jaydeep Sinha , Amir Azordegan
- Applicant: KLA-Tencor Corporation
- Applicant Address: US CA Milpitas
- Assignee: KLA-Tencor Corporation
- Current Assignee: KLA-Tencor Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Suiter Swantz pc llo
- Main IPC: H01L21/66
- IPC: H01L21/66 ; G01B9/02 ; G03F7/20 ; H01J37/317 ; H01J37/28 ; H01J37/304

Abstract:
Systems and methods for providing improved scanner corrections are disclosed. Scanner corrections provided in accordance with the present disclosure may be referred to as wafer geometry aware scanner corrections. More specifically, wafer geometry and/or wafer shape signature information are utilized to improve scanner corrections. By removing the wafer geometry as one of the error sources that may affect the overlay accuracy, better scanner corrections can be obtained because one less contributing factor needs to be modeled.
Public/Granted literature
- US20150212429A1 Using Wafer Geometry to Improve Scanner Correction Effectiveness for Overlay Control Public/Granted day:2015-07-30
Information query
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