Invention Grant
- Patent Title: Memory testing system
- Patent Title (中): 内存测试系统
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Application No.: US14495506Application Date: 2014-09-24
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Publication No.: US09514842B2Publication Date: 2016-12-06
- Inventor: Dragos F. Botea , Bibo Li , Vijay M. Bettada
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G11C29/08 ; G11C8/06 ; G11C11/4093 ; G11C29/12 ; G11C29/02 ; G11C29/14 ; G11C29/56

Abstract:
Techniques are disclosed relating to memory testing. In one embodiment, an integrated circuit is disclosed that includes a memory and an interface circuit. The interface circuit is configured to receive one or more testing signals from a built in self-test (BIST) unit. The interface circuit is further configured to receive, independently from the one or more testing signals, one or more configuration signals from automated test equipment (ATE). The interface circuit is further configured to issue one or more instruction signals to the memory based on the one or more testing signals and based on the one or more configuration signals. In some embodiments, the interface circuit is configured to enable the BIST unit to detect errors in functions the BIST unit is not designed to test.
Public/Granted literature
- US20160086678A1 MEMORY TESTING SYSTEM Public/Granted day:2016-03-24
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