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US09524986B2 Trapping dislocations in high-mobility fins below isolation layer 有权
在隔离层下方的高迁移率翅片中捕获位错

Trapping dislocations in high-mobility fins below isolation layer
Abstract:
The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming a high-mobility fin field effect transistor (finFET) fin in a silicon semiconductor on insulator (SOI) substrate by trapping crystalline lattice dislocations that occur during epitaxial growth in a recess formed in a semiconductor layer. The crystalline lattice dislocations may remain trapped below a thin isolation layer, thereby reducing device thickness and the need for high-aspect ratio etching and fin formation.
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