发明授权
- 专利标题： Interconnection of multiple chips in a package
- 专利标题（中）： 封装中多个芯片的互连
-
申请号： US13996107申请日： 2011-12-22
-
公开(公告)号： US09535865B2公开(公告)日： 2017-01-03
- 发明人: Thomas P. Thomas , Randy B. Osborne , Rajesh Kumar
- 申请人： Thomas P. Thomas , Randy B. Osborne , Rajesh Kumar
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Blakely, Sokoloff, Taylor & Zafman LLP
- 国际申请： PCT/US2011/066976 WO 20111222
- 国际公布： WO2013/095538 WO 20130627
- 主分类号： G06F13/00
- IPC分类号： G06F13/00 ; G06F13/364 ; G06F13/14 ; G06F13/40 ; G06F13/42 ; G06F3/0488 ; G06F13/16
摘要：
An interface. A first set of single-ended transmitter circuits reside on a first die having a master device. A first set of single-ended receiver circuits reside on a second die. The receiver circuits have no termination and no equalization. The second die has a slave device responsive to the master device of the first die. Conductive lines connect the first set of transmitter circuits and the first set of receiver circuits. The lengths of the conductive lines are matched.
公开/授权文献
信息查询
