Invention Grant
US09577061B2 Asymmetric high-K dielectric for reducing gate induced drain leakage 有权
用于减小栅极引起的漏极泄漏的非对称高K电介质

Asymmetric high-K dielectric for reducing gate induced drain leakage
Abstract:
An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes performing an implant process on a high-k dielectric sidewall of a gate structure. The method further includes performing an oxygen annealing process to grow an oxide region on a drain side of the gate structure, while inhibiting oxide growth on a source side of the gate structure adjacent to a source region.
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