An approach for simulating a block of a circuit design includes using a row-matching table and a port state vector. The row-matching table includes a plurality of rows, and each row includes encoded input match patterns corresponding to a plurality of input ports of the block and an associated output value. The port state vector includes input state codes associated with the input ports. In response to an update of an input signal value at one of the input ports during simulation, the input state code associated with the one input port is updated according to the updated input signal value. A bit-to-bit pattern match is performed for each bit in the port state vector to a corresponding bit in the encoded input match patterns in one or more rows of the row-matching table. The associated output value of a matching row is selected as a new output value.