Tamper-respondent assemblies and methods of fabrication are provided which include an electronic enclosure and a tamper-respondent electronic circuit structure. The electronic enclosure encloses, at least in part, at least one electronic component to be protected, and includes an inner main surface, and an inner sidewall surface which has at least one inner-sidewall corner. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor covering, at least in part, the inner sidewall surface of the electronic enclosure. The tamper-respondent sensor includes multiple slots provided therein. The multiple slots facilitate disposing the tamper-respondent sensor to cover the at least one inner-sidewall corner of the inner sidewall surface by allowing for one or more regions of overlap of the tamper-respondent sensor at the at least one inner-sidewall corner of the electronic enclosure.