公开(公告)号：US11302651B2

公开(公告)日：2022-04-12

申请号：US16575549

申请日：2019-09-19

Applicant: International Business Machines Corporation

Inventor： Kamal K. Sikka ,  Krishna R. Tunga ,  Hilton T. Toy ,  Thomas Weiss ,  Shidong Li ,  Sushumna Iruvanti

IPC: H05K1/02 ,  H05K1/11 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L21/027 ,  H05K3/30 ,  H05K1/18 ,  H05K1/03

Abstract: A technique relates to an electronic package. A substrate is configured to receive a chip. A stiffener is attached to the substrate. The stiffener includes a core material with a first material formed on opposing sides of the core material.

公开(公告)号：US10916507B2

公开(公告)日：2021-02-09

申请号：US16209013

申请日：2018-12-04

Applicant: International Business Machines Corporation

Inventor： Charles L Arvin ,  Brian W Quinlan ,  Steve Ostrander ,  Thomas Weiss ,  Mark W Kapfhammer ,  Shidong Li

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56

Abstract: A multiple chip carrier assembly including a carrier having a first surface and a second surface is attached to a plurality of chips is described. The plurality of chips include a first chip and a second chip. Each of the chips has first surface with a first set of solder balls for connecting to a package and a second set of solder balls for connecting to a high signal density bridge element. A second surface of each chip is bonded to the first surface of the carrier. A package has a first surface which is connected to the first sets of solder balls of the first and second chips. A high signal density bridge element having high signal density wiring on one or more layers is connected to the second sets of solder balls of the first and second chips. The bridge element is disposed between the first surface of the package and the first surfaces of the first and second chips.

公开(公告)号：US10832987B2

公开(公告)日：2020-11-10

申请号：US15934972

申请日：2018-03-24

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Charles L. Arvin ,  Marcus E. Interrante ,  Thomas E. Lombardi ,  Hilton T. Toy ,  Krishna R. Tunga ,  Thomas Weiss

IPC: H01L23/373 ,  H05K1/02 ,  H01L23/42 ,  H01L23/538 ,  H01L23/00

Abstract: A method of managing thermal warpage of a laminate which includes: assembling a stiffener and an adhesive on the laminate, the stiffener being a material that has a higher modulus of elasticity than the laminate; applying a force to deform the laminate a predetermined amount; heating the laminate, stiffener and adhesive to a predetermined temperature at which the adhesive cures to bond the stiffener to the laminate; cooling the laminate, stiffener and adhesive to a temperature below the predetermined temperature, the laminate maintaining its deformed shape.

公开(公告)号：US20200312812A1

公开(公告)日：2020-10-01

申请号：US16369532

申请日：2019-03-29

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Bhupender Singh ,  Richard Francis Indyk ,  Steve Ostrander ,  Thomas Weiss ,  Mark Kapfhammer

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/532 ,  H01L23/522

Abstract: A multi-die integrated circuit device and a method of fabricating the multi-die integrated circuit device involve a substrate. Two or more dice include components that implement functionality of the multi-die integrated circuit. The components include logic gates. The multi-die integrated circuit device also includes a spacer disposed between the substrate and each of the two or more dice. Each of the two or more dice makes direct electrical contact with the substrate without making direct electrical contact with the spacer through holes in the spacer.

公开(公告)号：US20200243479A1

公开(公告)日：2020-07-30

申请号：US16256344

申请日：2019-01-24

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Thomas Weiss ,  Thomas Anthony Wassick ,  Steve Ostrander

IPC: H01L23/00 ,  H01L25/00

Abstract: Place a first semiconductor chip onto an alignment carrier with protrusions of the semiconductor chip inserted into corresponding cavities of the alignment carrier, so that the protrusions and cavities locate the semiconductor chip with interconnect contacts overlying a window that is formed through the alignment carrier. Place a second semiconductor chip onto the alignment carrier with protrusions of the second semiconductor chip inserted into cavities of the alignment carrier, so that the protrusions and cavities locate the second semiconductor chip with interconnect contacts of the second semiconductor chip adjacent to the interconnect contacts of the first semiconductor chip and overlying the window. Fasten the semiconductor chips to the alignment carrier. Touch contacts of a interconnect bridge against the interconnect contacts of the first and second semiconductor chips by putting the interconnect bridge through the window.

公开(公告)号：US10327343B2

公开(公告)日：2019-06-18

申请号：US15193556

申请日：2016-06-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Michael J. Fisher ,  David C. Long ,  Donald Merte ,  Robert Weiss ,  Thomas Weiss

IPC: H05K5/02 ,  B29C65/02 ,  H05K5/00 ,  H05K5/06 ,  B29L31/00

Abstract: Assembly apparatuses and processes are provided which include a pressure cure fixture. The pressure cure fixture is sized to reside within a container, such as an electronic enclosure, and facilitate applying pressure to an adhesive disposed over an inner surface of the container. The pressure cure fixture is formed of a material with a higher coefficient of thermal expansion (CTE) than the container, and is sized to correspond, at least in part, to an inner space of the container while allowing for the adhesive and a surface-mount element to be disposed between the pressure cure fixture and the inner surface of the container. When heated, the pressure cure fixture expands greater than the container and imparts the pressure to the surface-mount element and the adhesive to facilitate securing the surface-mount element to the inner surface of the container.

公开(公告)号：US10251288B2

公开(公告)日：2019-04-02

申请号：US15836966

申请日：2017-12-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Michael J. Fisher ,  David C. Long ,  Michael T. Peets ,  Robert Weiss ,  Thomas Weiss ,  James E. Tersigni

IPC: G06F1/16 ,  H05K5/02 ,  G06F21/00 ,  G06F21/86

Abstract: Tamper-respondent assemblies, electronic packages and fabrication methods are provided which incorporate a vent structure. The tamper-respondent assembly includes an electronic enclosure to enclose, at least in part, an electronic component(s) to be protected. The electronic enclosure includes an inner surface, and an air vent. A tamper-respondent electronic circuit structure is provided which includes a tamper-respondent sensor disposed to cover, at least part, the inner surface of the electronic enclosure, and define, at least in part, a secure volume about the electronic component(s). The vent structure includes at least one air passage coupling in fluid communication the secure volume and the air vent of the electronic enclosure to allow air pressure within the secure volume to equalize with air pressure external to the tamper-respondent assembly.

公开(公告)号：US09999124B2

公开(公告)日：2018-06-12

申请号：US15341108

申请日：2016-11-02

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： James A. Busby ,  Michael J. Fisher ,  Michael A. Gaynes ,  David C. Long ,  Thomas Weiss

IPC: G01N27/20 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K1/0275 ,  G01N27/20 ,  G06F21/86 ,  G06F2221/2143 ,  H05K1/028 ,  H05K1/182 ,  H05K2201/09036

Abstract: Tamper-respondent assemblies with regions of increased susceptibility to a tamper event are provided, which include one or more tamper-detect sensors, one or more conductive traces, and an adhesive. The tamper-detect sensor(s) facilitates defining a secure volume about one or more electronic components to be protected, and the conductive trace(s) forms, at least in part, a tamper-detect network of the tamper-respondent assembly. The conductive trace(s) is disposed, at least in part, on the tamper-detect sensor(s). The adhesive contacts the conductive trace(s) on the tamper-detect sensor(s), and is disposed, at least in part, between and couples a surface of the tamper-detect sensor(s) to another surface of the assembly. Together, the tamper-detect sensor(s), conductive trace(s), and adhesive are a subassembly, with the subassembly being configured with multiple regions of increased susceptibility to breaking of the conductive trace(s) with a tamper event through the subassembly.

公开(公告)号：US20180098423A1

公开(公告)日：2018-04-05

申请号：US15827275

申请日：2017-11-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： William L. Brodsky ,  James A. Busby ,  Edward N. Cohen ,  Silvio Dragone ,  Michael J. Fisher ,  David C. Long ,  Michael T. Peets ,  William Santiago-Fernandez ,  Thomas Weiss

IPC: H05K1/02 ,  H05K5/02 ,  H05K1/18 ,  H05K1/11

CPC classification number: H05K1/0275 ,  G08B13/128 ,  H05K1/0216 ,  H05K1/112 ,  H05K1/181 ,  H05K3/22 ,  H05K5/0208 ,  H05K2201/10151 ,  H05K2201/10265 ,  H05K2201/10371

Abstract: Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure to circuit board protection. The tamper-respondent assemblies include a circuit board, and an electronic enclosure mounted to the circuit board and facilitating enclosing at least one electronic component within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and the tamper-respondent electronic circuit structure includes a tamper-respondent circuit. An adhesive is provided to secure, in part, the electronic enclosure to the circuit board. The adhesive contacts, at least in part, the tamper-respondent circuit so that an attempted separation of the electronic enclosure from the circuit board causes the adhesive to break the tamper-respondent circuit, facilitating detection of the separation by a monitor circuit of the tamper-respondent electronic circuit structure.

公开(公告)号：US09913370B2

公开(公告)日：2018-03-06

申请号：US15154077

申请日：2016-05-13

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： James A. Busby ,  Silvio Dragone ,  Michael J. Fisher ,  Michael A. Gaynes ,  David C. Long ,  Kenneth P. Rodbell ,  William Santiago-Fernandez ,  Thomas Weiss

IPC: G01L1/24 ,  H05K1/02 ,  H05K1/18 ,  H05K13/00

CPC classification number: H05K1/0275 ,  G06F21/87 ,  H05K1/181 ,  H05K1/185 ,  H05K5/0208 ,  H05K2201/10151 ,  H05K2201/10371

Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass enclosure enclosing, at least in part, at least one electronic component within a secure volume, and a tamper-respondent detector. The glass enclosure includes stressed glass with a compressively-stressed surface layer, and the tamper-respondent detector monitors, at least in part, the stressed glass to facilitate defining the secure volume. The stressed glass fragments with an attempted intrusion event through the stressed glass, and the tamper-respondent detector detects the fragmenting of the stressed glass. In certain embodiments, the stressed glass may be a machined glass enclosure that has undergone ion-exchange processing, and the compressively-stressed surface layer of the stressed glass may be compressively-stressed to ensure that the stressed glass fragments into glass particles of fragmentation size less than 1000 μm with the intrusion event.