Invention Grant
- Patent Title: Deep trench isolation shrinkage method for enhanced device performance
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Application No.: US14314193Application Date: 2014-06-25
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Publication No.: US09653507B2Publication Date: 2017-05-16
- Inventor: Cheng-Hsien Chou , Shih Pei Chou , Chih-Yu Lai , Sheng-Chau Chen , Chih-Ta Chen , Yeur-Luen Tu , Chia-Shiung Tsai
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L27/146
- IPC: H01L27/146 ; H01L33/20

Abstract:
Some embodiments of the present disclosure relate to a deep trench isolation (DTI) structure configured to enhance efficiency and performance of a photovoltaic device. The photovoltaic device comprises a functional layer disposed over an upper surface of a semiconductor substrate, and a pair of pixels formed within the semiconductor substrate, which are separated by the DTI structure. The DTI structure is arranged within a deep trench. Sidewalls of the deep trench are partially covered with a protective sleeve formed along the functional layer prior to etching the deep trench. The protective sleeve prevents etching of the functional layer while etching the deep trench, which prevents contaminants from penetrating the pair of pixels. The protective sleeve also narrows the width of the DTI structure, which increases pixel area and subsequently the efficiency and performance of the photovoltaic device.
Public/Granted literature
- US20150380447A1 DEEP TRENCH ISOLATION SHRINKAGE METHOD FOR ENHANCED DEVICE PERFORMANCE Public/Granted day:2015-12-31
Information query
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