Invention Grant
- Patent Title: Method for manufacturing semiconductor element
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Application No.: US15279811Application Date: 2016-09-29
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Publication No.: US09653644B2Publication Date: 2017-05-16
- Inventor: Hiroaki Tamemoto , Ryota Taoka
- Applicant: NICHIA CORPORATION
- Applicant Address: JP Anan-shi
- Assignee: NICHIA CORPORATION
- Current Assignee: NICHIA CORPORATION
- Current Assignee Address: JP Anan-shi
- Agency: Global IP Counselors, LLP
- Priority: JP2015-196595 20151002
- Main IPC: H01L21/786
- IPC: H01L21/786 ; B23K26/50 ; B23K26/53 ; H01L33/00 ; H01L33/06 ; H01L33/32 ; H01L33/42 ; B23K26/00 ; B23K101/40

Abstract:
A method for manufacturing a semiconductor element includes providing a wafer having a sapphire substrate and a semiconductor stacked body disposed on the sapphire substrate, performing a first scanning of a portion of the sapphire substrate in which a laser beam is irradiated into an interior of the sapphire substrate, performing a second scanning of the portion of the sapphire substrate in which a laser beam is irradiated into the interior of the sapphire substrate, the second scanning occurring after the first scanning and before a void is produced in the interior of the sapphire substrate irradiated with the laser beam in the first scanning, and separating the wafer into a plurality of semiconductor elements.
Public/Granted literature
- US20170098733A1 METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT Public/Granted day:2017-04-06
Information query
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