Invention Grant
- Patent Title: Techniques for programming of select gates in NAND memory
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Application No.: US15062987Application Date: 2016-03-07
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Publication No.: US09659656B2Publication Date: 2017-05-23
- Inventor: Hao Nguyen , Man Mui , Khanh Nguyen , Seungpil Lee , Toru Ishigaki , Yingda Dong
- Applicant: SanDisk Technologies LLC
- Applicant Address: US TX Plano
- Assignee: SanDisk Technologies LLC
- Current Assignee: SanDisk Technologies LLC
- Current Assignee Address: US TX Plano
- Agency: Vierra Magen Marcus LLP
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/04 ; G11C16/20 ; G11C16/24 ; G11C16/26 ; G11C16/34 ; G11C11/56 ; G11C16/08 ; H01L27/11556 ; H01L27/11582 ; G11C13/00

Abstract:
In a non-volatile memory formed according to a NAND-type architecture that has, on one or both ends of the NAND strings, multiple select gates including some with programmable threshold voltages, a structure and corresponding for efficiently programming of such select gates. On the drain side, the end most of multiple drain select transistors is individually controllable and used for biasing purposes while one or more other drain side select gates are collectively programmed to set adjust their threshold voltage. Independently, on the source side, the end most of multiple source select transistors is individually controllable and used for biasing purposes while other source side select gates are collectively programmed to set adjust their threshold voltage.
Public/Granted literature
- US20160189778A1 TECHNIQUES FOR PROGRAMMING OF SELECT GATES IN NAND MEMORY Public/Granted day:2016-06-30
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