Invention Grant
- Patent Title: Integrated vertical trench MOS transistor
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Application No.: US14949528Application Date: 2015-11-23
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Publication No.: US09673298B2Publication Date: 2017-06-06
- Inventor: Antonio Giuseppe Grimaldi , Davide Giuseppe Patti , Monica Miccichè , Salvatore Liotta , Angela Longhitano
- Applicant: STMicroelectronics S.R.L.
- Applicant Address: IT Agrate Brianza
- Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee Address: IT Agrate Brianza
- Agency: Seed IP Law Group LLP
- Priority: ITMI2012A1599 20120925
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/66 ; H01L29/78 ; H01L27/06 ; H01L29/861 ; H01L29/423
Abstract:
A VTMOS transistor in semiconductor material of a first type of conductivity includes a body region of a second type of conductivity and a source region of the first type of conductivity. A gate region extends into the main surface through the body region and is insulated from the semiconductor material. A region of the gate region extends onto the main surface is insulated from the rest of the gate region. An anode region of the first type of conductivity is formed into said insulated region, and a cathode region of the second type of conductivity is formed into said insulated region in contact with the anode region; the anode region and the cathode region define a thermal diode electrically insulated from the chip.
Public/Granted literature
- US20160087080A1 INTEGRATED VERTICAL TRENCH MOS TRANSISTOR Public/Granted day:2016-03-24
Information query
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