公开(公告)号：US08941385B2

公开(公告)日：2015-01-27

申请号：US13654891

申请日：2012-10-18

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Giuseppe Patti ,  Mario Paparo ,  Domenico Rossi

IPC: H01T21/02 ,  H01T13/30 ,  F02P17/12 ,  H01T13/40 ,  H01T13/60

CPC classification number: H01T13/40 ,  F02P2017/125 ,  H01T13/60 ,  H01T21/02

Abstract: A spark plug, including an insulator embedding a first metallic electrode axially extending therethrough from a high voltage outer end terminal to the center of the inner end of the insulator from which it protrudes; a metallic ground electrode isolated from the first electrode and having an extended inner termination facing toward the first electrode extending from the insulator tip for defining therebetween a spark gap, a resistive element connected to the ground electrode such that upon mounting the spark plug in an internal combustion engine, the ground electrode electrically connects to the engine body through the resistive element; and a second outer termination of the ground electrode, adapted to constitute an accessible sensing terminal.

Abstract translation: 一种火花塞，包括绝缘体，其嵌入从高压外端端子轴向延伸穿过其中突出的绝缘体的内端的中心的第一金属电极; 金属接地电极，与第一电极隔离并且具有面向从第一电极延伸的第一电极的延伸的内部端子，其从绝缘体末端延伸以在其间形成火花隙;电阻元件，连接到接地电极，使得在将火花塞安装在内部 内燃机，接地电极通过电阻元件电连接到发动机主体; 以及接地电极的第二外部端子，适于构成可访问感测端子。

公开(公告)号：US11742421B2

公开(公告)日：2023-08-29

申请号：US17867491

申请日：2022-07-18

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Salvatore Privitera ,  Davide Giuseppe Patti

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L29/66734

Abstract: A field effect transistor has a semiconductor layer with a top surface extending in a horizontal plane, and an active area defined in which are trench gate regions, which extend in depth with respect to the top surface and have an insulating coating layer and a conductive inner layer, and source regions, adjacent to the trench gate regions so as to form a conductive channel extending vertically. The trench gate regions have a plurality of first gate regions, which extend in length in the form of stripes through the active area along a first direction of the horizontal plane, and moreover a plurality of second gate regions, which extend in length in the form of stripes through the same active area along a second direction of the horizontal plane, orthogonal to, and crossing, the first gate regions. In particular, the first gate regions and second gate regions cross in the active area, joining with a non-zero curvature radius.

公开(公告)号：US11658181B2

公开(公告)日：2023-05-23

申请号：US16775843

申请日：2020-01-29

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Davide Giuseppe Patti

IPC: H01L27/088 ,  H01L21/8236 ,  H01L21/8258 ,  H01L29/16 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66 ,  H01L29/778 ,  H01L29/78 ,  H03K17/687

CPC classification number: H01L27/0883 ,  H01L21/8236 ,  H01L21/8258 ,  H01L29/16 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/66712 ,  H01L29/7786 ,  H01L29/781 ,  H03K17/6871

Abstract: The power device is formed by a D-mode HEMT and by a MOSFET in cascade to each other and integrated in a chip having a base body and a heterostructure layer on the base body. The D-mode HEMT includes a channel area formed in the heterostructure layer; the MOSFET includes a first and a second conduction region formed in the base body, and an insulated-gate region formed in the heterostructure layer, laterally and electrically insulated from the D-mode HEMT. A first metal region extends through the heterostructure layer, laterally to the channel area and in electrical contact with the channel area and the first conduction region.

公开(公告)号：US11469136B2

公开(公告)日：2022-10-11

申请号：US17001295

申请日：2020-08-24

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Simone Dario Mariani ,  Fabrizio Fausto Renzo Toia ,  Marco Sambi ,  Davide Giuseppe Patti ,  Marco Morelli ,  Giuseppe Barillaro

IPC: H01L21/76 ,  H01L21/762 ,  H01L21/02 ,  H01L21/306 ,  H01L29/06 ,  H01L29/78

Abstract: A technique to make silicon oxide regions from porous silicon and related semiconductor structures is disclosed. The porous silicon is made in situ by anodizing P doped silicon regions. Thus, the shape and profile of the oxide regions may be controlled by controlling the shape and profile of the P doped silicon regions.

公开(公告)号：US10153631B2

公开(公告)日：2018-12-11

申请号：US14957430

申请日：2015-12-02

Applicant: STMicroelectronics S.R.L.

Inventor： Antonino Torres ,  Davide Giuseppe Patti

IPC: H02H3/08 ,  H02H9/02

Abstract: An electrical protection device including an input line, an output terminal, and a power transistor coupled between the input line and the output terminal A sensing transistor is connected between the input line and the output terminal and has a body terminal. A control stage is coupled to respective control terminals of the power transistor and of the sensing transistor and is configured to limit a first current of the power transistor to a protection value. A body-driving stage is coupled to the body terminal and is configured to bias the body terminal of the sensing transistor as a function of an operating condition of the power transistor.

公开(公告)号：US09865421B2

公开(公告)日：2018-01-09

申请号：US15291962

申请日：2016-10-12

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Davide Giuseppe Patti ,  Gianleonardo Grasso

IPC: H01L29/76 ,  H01L29/94 ,  H01J9/02 ,  H01L29/78 ,  H01L29/12 ,  H01L29/66 ,  H01J21/10 ,  G01K7/01 ,  H01J1/304

CPC classification number: H01J9/025 ,  G01K7/01 ,  H01J1/3044 ,  H01J21/10 ,  H01J21/105 ,  H01L29/12 ,  H01L29/66969 ,  H01L29/7827

Abstract: An integrated vacuum microelectronic structure is described as having a highly doped semiconductor substrate, a first insulating layer placed above said doped semiconductor substrate, a first conductive layer placed above said first insulating layer, a second insulating layer placed above said first conductive layer, a vacuum trench formed within said first and second insulating layers and extending to the highly doped semiconductor substrate, a second conductive layer placed above said vacuum trench and acting as a cathode, a third metal layer placed under said highly doped semiconductor substrate and acting as an anode, said second conductive layer is placed adjacent to the upper edge of said vacuum trench, the first conductive layer is separated from said vacuum trench by portions of said second insulating layer and is in electrical contact with said second conductive layer.

公开(公告)号：US20170335819A1

公开(公告)日：2017-11-23

申请号：US15672938

申请日：2017-08-09

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Giuseppe Patti ,  Mario Paparo

IPC: F02P17/12 ,  G01M15/09 ,  F02D41/22 ,  F02D41/24 ,  F02D35/02 ,  G01M15/04

CPC classification number: F02P17/12 ,  F02D35/021 ,  F02D35/024 ,  F02D41/22 ,  F02D41/2422 ,  F02D41/2425 ,  G01M15/042 ,  G01M15/09 ,  Y02T10/40

Abstract: The pressure in the combustion chamber of an electronically controlled spark plug ignition engine may be estimated in real time mode without specific sensors by processing sensed ionization current data to calculate features of the current waveform proven to be correlated to the pressure inside the engine cylinders and correlating them on the basis of a look up table of time invariant correlation coefficients generated through a calibration campaign of tests on a test engine purposely equipped with sensors. A mathematical model of the electrical and physical spark plug ignition system and combustion chamber of the engine is refined during calibration by iteratively testing the interactive performance of correlation coefficients of related terms of a mathematical expression of the model and comparing the expressed pressure value with the real pressure value as measured by a sensor.

公开(公告)号：US20170148604A1

公开(公告)日：2017-05-25

申请号：US15150895

申请日：2016-05-10

Applicant: STMICROELECTRONICS S.R.L. ,  STMICROELECTRONICS PTE LTD

Inventor： Davide Giuseppe Patti ,  Myung Sung Kim

IPC: H01J19/02 ,  H01J21/20 ,  H01J21/04 ,  H01J9/18

CPC classification number: H01J19/02 ,  H01J9/025 ,  H01J9/18 ,  H01J21/04 ,  H01J21/105 ,  H01J21/20 ,  H01J2209/012 ,  H01J2209/02

Abstract: A vacuum integrated electronic device has an anode region of conductive material; an insulating region on top of the anode region; a cavity extending through the insulating region and having a sidewall; and a cathode region. The cathode region has a tip portion extending peripherally within the cavity, adjacent to the sidewall of the cavity. The cathode region is formed by tilted deposition, carried out at an angle of 30-60° with respect to a perpendicular to the surface of device.

公开(公告)号：US11843369B2

公开(公告)日：2023-12-12

申请号：US17388920

申请日：2021-07-29

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Giuseppe Patti

IPC: H01L27/06 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H03K17/30

CPC classification number: H03K17/302 ,  H01L27/0629 ,  H01L29/0696 ,  H01L29/66734 ,  H01L29/7808 ,  H01L29/7813

Abstract: An integrated device includes at least one MOS transistor having a plurality of cells. In each of one or more of the cells a disabling structure is provided. The disabling structure is configured to be in a non-conductive condition when the MOS transistor is switched on in response to a control voltage comprised between a threshold voltage of the MOS transistor and an intervention voltage of the disabling structure, or to be in a conductive condition otherwise. A system comprising at least one integrated device as above is also proposed. Moreover, a corresponding process for manufacturing this integrated device is proposed.

公开(公告)号：US11610880B2

公开(公告)日：2023-03-21

申请号：US17182773

申请日：2021-02-23

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Giuseppe Patti

IPC: H01L27/02 ,  H01L29/10 ,  H01L29/78 ,  H01L29/417 ,  H01L29/66

Abstract: Power MOS device, in which a power MOS transistor has a drain terminal that is coupled to a power supply node, a gate terminal that is coupled to a drive node and a source terminal that is coupled to a load node. A detection MOS transistor has a drain terminal that is coupled to a detection node, a gate terminal that is coupled to the drive node and a source terminal that is coupled to the load node. A detection resistor has a first terminal coupled to the power supply node and a second terminal coupled to the detection node.