Invention Grant
- Patent Title: Interconnect structure for semiconductor devices
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Application No.: US15282704Application Date: 2016-09-30
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Publication No.: US09679848B2Publication Date: 2017-06-13
- Inventor: Han-Hsin Kuo , Chung-Chi Ko , Neng-Jye Yang , Fu-Ming Huang , Chi-Ming Tsai , Liang-Guang Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L23/528 ; H01L21/3105 ; H01L21/321 ; H01L21/768 ; H01L23/522 ; H01L21/02 ; H01L21/311 ; H01L23/532

Abstract:
An interconnect and a method of forming an interconnect for a semiconductor device is provided. The interconnect is formed by treating an upper surface of a dielectric layer to create a high density layer. The treatment may include, for example, creating a high density monolayer using hexamethyldisilazane (HMDS), trimethylsilydiethylamine (TMSDEA) or trimethylsilylacetate (OTMSA). After treating, the dielectric layer may be patterned to create openings, which are subsequently filled with a conductive material. Excess conductive material may be removed using, for example, a chemical mechanical polishing.
Public/Granted literature
- US20170018496A1 Interconnect Structure for Semiconductor Devices Public/Granted day:2017-01-19
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