Invention Grant
- Patent Title: Group III-N nanowire transistors
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Application No.: US15197615Application Date: 2016-06-29
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Publication No.: US09691857B2Publication Date: 2017-06-27
- Inventor: Han Wui Then , Robert Chau , Benjamin Chu-Kung , Gilbert Dewey , Jack Kavalieros , Matthew Metz , Niloy Mukherjee , Ravi Pillarisetty , Marko Radosavljevic
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L31/00 ; H01L29/15 ; H01L27/088 ; H01L29/66 ; H01L29/775 ; H01L29/778 ; H01L29/20 ; H01L29/786 ; H01L29/78 ; B82Y10/00 ; H01L23/66 ; H01L27/06 ; H01L29/04 ; H01L29/205 ; H01L29/423 ; H01L21/02

Abstract:
A group III-N nanowire is disposed on a substrate. A longitudinal length of the nanowire is defined into a channel region of a first group III-N material, a source region electrically coupled with a first end of the channel region, and a drain region electrically coupled with a second end of the channel region. A second group III-N material on the first group III-N material serves as a charge inducing layer, and/or barrier layer on surfaces of nanowire. A gate insulator and/or gate conductor coaxially wraps completely around the nanowire within the channel region. Drain and source contacts may similarly coaxially wrap completely around the drain and source regions.
Public/Granted literature
- US20160315153A1 GROUP III-N NANOWIRE TRANSISTORS Public/Granted day:2016-10-27
Information query
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