Invention Grant
- Patent Title: Endian configuration memory and ECC protecting processor endianess mode circuit
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Application No.: US14602933Application Date: 2015-01-22
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Publication No.: US09710318B2Publication Date: 2017-07-18
- Inventor: Yanyang Xiao , Alexandre Pierre Palus , Karl Friedrich Greb , Kevin Patrick Lavery , Paul Krause
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: G06F11/07
- IPC: G06F11/07 ; G11C29/52 ; G11C29/00 ; G11C29/48 ; G06F11/10 ; G11C29/14 ; H03M13/27 ; G06F13/40 ; G06K9/00 ; G06F9/30 ; G06F11/28 ; G06F11/16 ; H03M13/13 ; G11C29/04

Abstract:
An electronic circuit includes a microcontroller processor (410), a peripheral (420) coupled with the processor, an endian circuit (470) coupled with the processor and the peripheral to selectively provide different endianess modes of operation, and a detection circuit (140) to detect a failure to select a given endianess, whereby inadvertent switch of endianess due to faults is avoided. Other circuits, devices, systems, methods of operation and processes of manufacture are also disclosed.
Public/Granted literature
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